
#ifdef ARCTIC
#include "usw/include/drv_common.h"
#include "usw/include/drv_enum.h"
#include "usw/include/drv_ftm.h"
#include "usw/include/drv_ser.h"

#undef DRV_DEF_C
#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_E

#ifdef DRV_DEF_C
	#error DRV_DEF_C has been defined
#endif

#ifdef DRV_DEF_M
	#error DRV_DEF_M has been defined
#endif

#ifdef DRV_DEF_D
	#error DRV_DEF_D has been defined
#endif

#ifdef DRV_DEF_F
	#error DRV_DEF_F has been defined
#endif

#ifdef DRV_DEF_E
	#error DRV_DEF_E has been defined
#endif

#define DRV_DEF_DD(ModuleName, InstNum, RegName,RegName2,SliceType, OpType, Entry, Word, EntryOffset, ...)
#define DRV_DEF_FF(ModuleName, InstNum, RegName, RegName2, ...)

extern tables_info_t drv_at_tbls_list[];

#if(SDK_WORK_PLATFORM == 1)
 /*DS ADDR*/
#define CTC_DS_ADDR(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   static addrs_t RegName##_tbl_addrs_at[(0==InstNum)?(2):(InstNum*2)] = {__VA_ARGS__, 0x80000000};
#else
#define CTC_DS_ADDR(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   static addrs_t RegName##_tbl_addrs_at[(0==InstNum)?(1):(InstNum)] = {__VA_ARGS__};
#endif

#if(SDK_WORK_PLATFORM == 1)
 /*DS LIST*/
#define CTC_DS_INFO(ModuleName, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   { \
      SliceType, \
      OpType, \
      Entry * ((sizeof(RegName##_tbl_addrs_at)/sizeof(addrs_t)) / 2), \
      0, \
      Word*4, \
      SdbType, \
      SdbRead, \
      Bus,    \
      Stats,  \
      sizeof(RegName##_tbl_addrs_at)/sizeof(addrs_t), \
      0,\
      sizeof(RegAlias##_tbl_fields_at)/sizeof(fields_t), \
      EntryOffset*4, \
      TcamMem,  \
      SliceType,\
      RegName##_t,\
      0, \
      RegName##_tbl_addrs_at, \
      RegAlias##_tbl_fields_at, \
   },
#define CTC_DS_INFO1(ModuleName, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   { \
      #ModuleName, \
      #RegName, \
      RegAlias##_tbl_fields_name_at, \
   },
#else
    /*DS LIST*/
#define CTC_DS_INFO(ModuleName, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   { \
      SliceType, \
      OpType, \
      Entry * (sizeof(RegName##_tbl_addrs_at)/sizeof(addrs_t)), \
      0, \
      Word*4, \
      SdbType,\
      SdbRead, \
      Bus,    \
      Stats,  \
      sizeof(RegName##_tbl_addrs_at)/sizeof(addrs_t), \
      0,\
      sizeof(RegAlias##_tbl_fields_at)/sizeof(fields_t), \
      EntryOffset*4, \
      TcamMem, \
      SliceType,\
      RegName##_t,\
      0,\
      RegName##_tbl_addrs_at, \
      RegAlias##_tbl_fields_at, \
   },
#define CTC_DS_INFO1(ModuleName, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, SdbType, SdbRead, TcamMem, Bus, Stats, ...) \
   { \
      #ModuleName, \
      #RegName, \
      RegAlias##_tbl_fields_name_at, \
   },
#endif

#define CTC_FIELD_E_INFO() \
   { \
   0, \
   0, \
   0, \
   NULL, \
   },
#define CTC_FIELD_E_INFO1() \
     { \
     "Invalid", \
     },

 /*Field Addr*/
#define CTC_FIELD_ADDR(ModuleName, RegName, FieldName, FullName, Bits, ...) \
  static segs_t RegName##_##FieldName##_tbl_segs_at[] = {__VA_ARGS__};

 /*Field Info*/
#define CTC_FIELD_INFO(ModuleName, RegName, FieldName, FullName, Bits, ...) \
   { \
	  RegName##_##FieldName##_f,\
      Bits, \
      sizeof(RegName##_##FieldName##_tbl_segs_at) / sizeof(segs_t), \
      RegName##_##FieldName##_tbl_segs_at, \
   },
#define CTC_FIELD_INFO1(ModuleName, RegName, FieldName, FullName, Bits, ...) \
     { \
      #FullName, \
     },

 /*DS Field List Seperator*/
#define CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
 }; \
 static fields_t RegName##_tbl_fields_at[] = {


#define DRV_DEF_C(MaxInstNum, MaxEntry, MaxWord, EntryOffset, MaxBits,MaxStartPos,MaxSegSize)

 /* Segment Info*/
#define DRV_DEF_M(ModuleName, InstNum)
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...) \
        CTC_FIELD_ADDR(ModuleName, RegName, FieldName, FullName, Bits, __VA_ARGS__)
#define DRV_DEF_E()
#define DRV_DEF_FIELD_E()
#include "usw/include/drv_ds_at.h"
#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_E
#undef DRV_DEF_FIELD_E
#undef DRV_DEF_DD

 /* Field Info*/
#define DRV_DEF_M(ModuleName, InstNum)
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...) \
        CTC_FIELD_INFO(ModuleName, RegName, FieldName, FullName, Bits, __VA_ARGS__)
#define DRV_DEF_E()
#define DRV_DEF_FIELD_E() CTC_FIELD_E_INFO()
#define DRV_DEF_DD(ModuleName, InstNum, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)

fields_t at_fields_1st = {0,0,0,NULL
#include "usw/include/drv_ds_at.h"
};

#ifndef DRV_DS_LITE
#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_DD
#undef DRV_DEF_E
#undef DRV_DEF_SDK_D
#undef DRV_DEF_SDK_F
#undef DRV_DEF_FIELD_E
#undef CTC_DS_SEPERATOR_INFO
 
#define CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
  }; \
  static fields_name_t RegName##_tbl_fields_name_at[] = {
 
   /* Field Name Info*/
#define DRV_DEF_M(ModuleName, InstNum)
#ifdef DRV_DS_LITE
#define DRV_DEF_D(RegName, Word, No)
#define DRV_DEF_F(RegName, FieldName, No)
#else
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
          CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...) \
          CTC_FIELD_INFO1(ModuleName, RegName, FieldName, FullName, Bits, __VA_ARGS__)
#endif
#define DRV_DEF_SDK_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
          CTC_DS_SEPERATOR_INFO(ModuleName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_SDK_F(ModuleName, InstNum, RegName, FieldName,FullName, Bits, ...) \
          CTC_FIELD_INFO1(ModuleName, RegName, FieldName, FullName, Bits, __VA_ARGS__)
#define DRV_DEF_E()
#define DRV_DEF_FIELD_E() CTC_FIELD_E_INFO1()
  
  fields_name_t at_fields_name = {NULL
#include "usw/include/drv_ds_at.h"
  };
#endif

#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_DD
#undef DRV_DEF_E
#undef DRV_DEF_FIELD_E

 /* DS Address*/
#define DRV_DEF_M(ModuleName, InstNum)
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_ADDR(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word,EntryOffset,  __VA_ARGS__)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...)
#define DRV_DEF_DD(ModuleName, InstNum, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_ADDR(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_E()
#define DRV_DEF_FIELD_E()
#include "usw/include/drv_ds_at.h"
#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_E

#undef DRV_DEF_DD
#undef DRV_DEF_FIELD_E

 /* DS List*/
#define DRV_DEF_M(ModuleName, InstNum)
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_INFO(ModuleName, RegName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...)

#define DRV_DEF_DD(ModuleName, InstNum, RegName, RegAlias,SliceType, OpType, Entry, Word, EntryOffset, ...) \
        CTC_DS_INFO(ModuleName, RegName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)

#define DRV_DEF_E() 
#define DRV_DEF_FIELD_E()

#define X_EMU_TYPE 1
tables_info_t drv_at_tbls_list[] = {
#include "usw/include/drv_ds_at.h"
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,NULL,NULL}
};
#ifndef DRV_DS_LITE
#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_F
#undef DRV_DEF_E
#undef DRV_DEF_SDK_D
#undef DRV_DEF_SDK_F
        
#undef DRV_DEF_DD
#undef DRV_DEF_FIELD_E

     /* DS List name*/
#define DRV_DEF_M(ModuleName, InstNum)
#ifdef DRV_DS_LITE
#define DRV_DEF_D(RegName, Word, No)
#define DRV_DEF_F(RegName, FieldName, No)
#else
#define DRV_DEF_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
                CTC_DS_INFO1(ModuleName, RegName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_F(ModuleName, InstNum, RegName, FieldName, FullName, Bits, ...)
#endif
#define DRV_DEF_DD(ModuleName, InstNum, RegName, RegAlias,SliceType, OpType, Entry, Word, EntryOffset, ...) \
                CTC_DS_INFO1(ModuleName, RegName, RegAlias, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_SDK_D(ModuleName, InstNum, RegName, SliceType, OpType, Entry, Word, EntryOffset, ...) \
                CTC_DS_INFO1(ModuleName, RegName, RegName, SliceType, OpType, Entry, Word, EntryOffset, __VA_ARGS__)
#define DRV_DEF_SDK_F(ModuleName, InstNum, RegName, FieldName, Bits, ...)
#define DRV_DEF_E() 
#define DRV_DEF_FIELD_E()


tables_name_t drv_at_tbls_name_list[] = {
#include "usw/include/drv_ds_at.h"
{NULL, NULL, NULL}
};
#endif

/*ECC Interrupt*/
#define DRV_ECC_F(...)    {__VA_ARGS__},

uint32 drv_at_enum[DRV_CONSTANT_MAX];

drv_mem_t drv_at_mem[DRV_FTM_MAX_ID];

uint32 drv_at_tcam_mem_map[] =
{
    UserIdHashTcamMem_t,         /*0*/
    UserIdTcamMem_t,             /*1*/
    ProgramIngAclTcamMem_t,      /*2*/
    ProgramEgrAclTcamMem_t,      /*3*/
    EgrSclHashTcamMem_t,         /*4*/
    LpmTcamTcamMem_t,            /*5*/
    IpeCidTcamMem_t,             /*6*/
    DsLtidSelectTcamMem_t,       /*7*/
    DsEgrLtidSelectTcamMem_t,    /*8*/
    IpeHdrAdjRouterMacTcamMem_t, /*9*/
    IpeHdrAdjUdfTcamMem_t,       /*10*/
    DsUserIdHash0TcamAdMem_t,    /*11*/
    DsUserIdHash1TcamAdMem_t,    /*12*/
    DsUserIdTcam0AdMem_t,        /*13*/
    DsUserIdTcam1AdMem_t,        /*14*/
    DsAclIngress_t,              /*15*/
    DsAclEgress_t,               /*16*/
    DsEgressScl0TcamAd_t,        /*17*/
    DsEgressScl1TcamAd_t,        /*18*/
    LpmTcamAdMem_t               /*19*/
};


drv_ecc_intr_tbl_t drv_ecc_at_err_intr_tbl[] =
{
#include "usw/include/drv_ecc_intr_at.h"
    {MaxTblId_t,0,0,0,0,0,0,0,0}
};

drv_ecc_sbe_cnt_t drv_ecc_at_sbe_cnt[] =
{
    {MaxTblId_t, BufRetrvDebugStats_t, BufRetrvDebugStats_pbDataSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp0BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp1BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp2BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp3BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp4BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp5BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp6BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp7BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp8BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp9BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp10BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp11BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp12BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp13BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp14BufPtrInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvGlbWrrParityStatus_t, BufRetrvGlbWrrParityStatus_bufRetrvDp15BufPtrInfoFifoSbeCnt_f},
    {PostBrEB0Ram0_t, BufRetrvPostBrEBParityStatus_t, BufRetrvPostBrEBParityStatus_postBrEB0Ram0SbeCnt_f},
    {MaxTblId_t, BufRetrvPostBrEBParityStatus_t, BufRetrvPostBrEBParityStatus_postBrEB1Ram0SbeCnt_f},
    {BufRetrvReorderInfoRam_t, BufRetrvPostBrPbIntfParityStatus_t, BufRetrvPostBrPbIntfParityStatus_bufRetrvReorderInfoRamSbeCnt_f},
    {BufRetrvReorderRam_t, BufRetrvPostBrPbIntfParityStatus_t, BufRetrvPostBrPbIntfParityStatus_bufRetrvReorderRamSbeCnt_f},
    {MaxTblId_t, BufRetrvPostBrPbIntfParityStatus_t, BufRetrvPostBrPbIntfParityStatus_postBrFreeInfoFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvPostBrPbIntfParityStatus_t, BufRetrvPostBrPbIntfParityStatus_postBrPktDataTrackFifoSbeCnt_f},
    {MaxTblId_t, BufRetrvPreBrParityStatus_t, BufRetrvPreBrParityStatus_asyncDeqMsgFifoSbeCnt_f},
    {PreBrMsgParkMem_t, BufRetrvPreBrParityStatus_t, BufRetrvPreBrParityStatus_preBrMsgParkMemSbeCnt_f},
    {PreBrPktMsgMem_t, BufRetrvPreBrParityStatus_t, BufRetrvPreBrParityStatus_preBrPktMsgMemSbeCnt_f},
    {MaxTblId_t, BufStoreDataPrepDpParityStatus_t, BufStoreDataPrepDpParityStatus_bsIpeFreePtrFifoSbeCnt_f},
    {MaxTblId_t, BufStoreDataPrepDpParityStatus_t, BufStoreDataPrepDpParityStatus_bsIpeIntfDataMem0SbeCnt_f},
    {MaxTblId_t, BufStoreDataPrepDpParityStatus_t, BufStoreDataPrepDpParityStatus_bsIpeIntfDataMem1SbeCnt_f},
    {MaxTblId_t, BufStoreDataPrepDpParityStatus_t, BufStoreDataPrepDpParityStatus_bsIpeIntfDataMem2SbeCnt_f},
    {MaxTblId_t, BufStoreDataPrepDpParityStatus_t, BufStoreDataPrepDpParityStatus_bsIpeIntfDataMem3SbeCnt_f},
    {AsyncBsIpeIntfSiFifoDp0_t, BufStoreDataPrepSliceParityStatus_t, BufStoreDataPrepSliceParityStatus_asyncBsIpeIntfFifoDp0SbeCnt_f},
    {AsyncBsIpeIntfSiFifoDp1_t, BufStoreDataPrepSliceParityStatus_t, BufStoreDataPrepSliceParityStatus_asyncBsIpeIntfFifoDp1SbeCnt_f},
    {BsWalkLinkListRtnFifo_t, BufStoreMcCtlDpParityStatus_t, BufStoreMcCtlDpParityStatus_bsWalkLinkListRtnFifoSbeCnt_f},
    {MaxTblId_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_asyncBsMetMsgIntfFifoDp0SbeCnt_f},
    {MaxTblId_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_asyncBsMetMsgIntfFifoDp1SbeCnt_f},
    {BsMcWrCtlMsgLinkListFifo0_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsMcWrCtlMsgLinkListFifo0SbeCnt_f},
    {BsMcWrCtlMsgLinkListFifo1_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsMcWrCtlMsgLinkListFifo1SbeCnt_f},
    {BsMetFifoReleaseFifo0_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsMetFifoReleaseFifo0SbeCnt_f},
    {BsMetFifoReleaseFifo1_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsMetFifoReleaseFifo1SbeCnt_f},
    {BsPktAbortReqFifo0_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsPktAbortReqFifo0SbeCnt_f},
    {BsPktAbortReqFifo1_t, BufStoreMcCtlSliceParityStatus_t, BufStoreMcCtlSliceParityStatus_bsPktAbortReqFifo1SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell0SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell1SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell2SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell3SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell4SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell5SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell6SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell7SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell8SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell9SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell10SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell11SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell12SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell13SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell14SbeCnt_f},
    {MaxTblId_t, BufStoreProcUcParityStatus_t, BufStoreProcUcParityStatus_bsBrFreeVoqCell15SbeCnt_f},
    {BsChanPktPtrMem_t, BufStoreUcCtlDpParityStatus_t, BufStoreUcCtlDpParityStatus_bsChanPktPtrMemSbeCnt_f},
    {BufStoreChanInfo_t, BufStoreUcCtlDpParityStatus_t, BufStoreUcCtlDpParityStatus_bufStoreChanInfoSbeCnt_f},
    {BufStoreChanStatus_t, BufStoreUcCtlDpParityStatus_t, BufStoreUcCtlDpParityStatus_bufStoreChanStatusSbeCnt_f},
    {MaxTblId_t, BufStoreUcCtlSliceParityStatus_t, BufStoreUcCtlSliceParityStatus_asyncBsIpfixIntfFifoSbeCnt_f},
    {MaxTblId_t, BufStoreUcCtlSliceParityStatus_t, BufStoreUcCtlSliceParityStatus_asyncBsMsgStoreIntfFifoDp0SbeCnt_f},
    {MaxTblId_t, BufStoreUcCtlSliceParityStatus_t, BufStoreUcCtlSliceParityStatus_asyncBsMsgStoreIntfFifoDp1SbeCnt_f},
    {BsUcWrCtlMsgLinkListFifo0_t, BufStoreUcCtlSliceParityStatus_t, BufStoreUcCtlSliceParityStatus_bsUcWrCtlMsgLinkListFifo0SbeCnt_f},
    {BsUcWrCtlMsgLinkListFifo1_t, BufStoreUcCtlSliceParityStatus_t, BufStoreUcCtlSliceParityStatus_bsUcWrCtlMsgLinkListFifo1SbeCnt_f},
    {BufStoreUcFreePtrRam0_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam0SbeCnt_f},
    {BufStoreUcFreePtrRam1_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam1SbeCnt_f},
    {BufStoreUcFreePtrRam2_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam2SbeCnt_f},
    {BufStoreUcFreePtrRam3_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam3SbeCnt_f},
    {BufStoreUcFreePtrRam4_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam4SbeCnt_f},
    {BufStoreUcFreePtrRam5_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam5SbeCnt_f},
    {BufStoreUcFreePtrRam6_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam6SbeCnt_f},
    {BufStoreUcFreePtrRam7_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam7SbeCnt_f},
    {BufStoreUcFreePtrRam8_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam8SbeCnt_f},
    {BufStoreUcFreePtrRam9_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam9SbeCnt_f},
    {BufStoreUcFreePtrRam10_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam10SbeCnt_f},
    {BufStoreUcFreePtrRam11_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam11SbeCnt_f},
    {BufStoreUcFreePtrRam12_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam12SbeCnt_f},
    {BufStoreUcFreePtrRam13_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam13SbeCnt_f},
    {BufStoreUcFreePtrRam14_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam14SbeCnt_f},
    {BufStoreUcFreePtrRam15_t, BufStoreUcFreePtrParityStatus_t, BufStoreUcFreePtrParityStatus_bufStoreUcFreePtrRam15SbeCnt_f},
    {DsXfcChannelPortMap_t, CpuMapParityStatus_t, CpuMapParityStatus_dsXfcChannelPortMapSbeCnt_f},
    {DsXfcState0_t, CpuMapParityStatus_t, CpuMapParityStatus_dsXfcState0SbeCnt_f},
    {DsXfcState1_t, CpuMapParityStatus_t, CpuMapParityStatus_dsXfcState1SbeCnt_f},
    {DsXfcState2_t, CpuMapParityStatus_t, CpuMapParityStatus_dsXfcState2SbeCnt_f},
    {EncapMem_t, CpuMapParityStatus_t, CpuMapParityStatus_encapMemSbeCnt_f},
    {DmaBatchAckMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaBatchAckMemSbeCnt_f},
    {DmaBatchReqMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaBatchReqMemSbeCnt_f},
    {DmaBatchWrTrackFifo_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaBatchWrTrackFifoSbeCnt_f},
    {DmaDescCache_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaDescCacheSbeCnt_f},
    {DmaInfoMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaInfoMemSbeCnt_f},
    {DmaPktRxMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaPktRxMemSbeCnt_f},
    {DmaPktTxMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaPktTxMemSbeCnt_f},
    {DmaRegRdMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaRegRdMemSbeCnt_f},
    {DmaScanWrMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaScanWrMemSbeCnt_f},
    {DmaUserRegMem_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaUserRegMemSbeCnt_f},
    {DmaWrReqDataFifo_t, DmaCtlParityStatus_t, DmaCtlParityStatus_dmaWrReqDataFifoSbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam0SbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam1SbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam2SbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam3SbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam4SbeCnt_f},
    {MaxTblId_t, DynamicAdParityStatus_t, DynamicAdParityStatus_shareAdRam5SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam0SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam1SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam2SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam3SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam4SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam5SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam6SbeCnt_f},
    {MaxTblId_t, DynamicEditParityStatus_t, DynamicEditParityStatus_shareEditRam7SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam0SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam1SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam2SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam3SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam4SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam5SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam6SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam7SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam8SbeCnt_f},
    {MaxTblId_t, DynamicKeyParityStatus_t, DynamicKeyParityStatus_shareKeyRam9SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam0SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam1SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam2SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam3SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam4SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam5SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam6SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam7SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam8SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam9SbeCnt_f},
    {MaxTblId_t, DynamicMiscParityStatus_t, DynamicMiscParityStatus_shareMiscRam10SbeCnt_f},
    {DsEgressScl0TcamAd_t, EgrSclHashParityStatus_t, EgrSclHashParityStatus_dsEgressScl0TcamAdSbeCnt_f},
    {DsEgressScl1TcamAd_t, EgrSclHashParityStatus_t, EgrSclHashParityStatus_dsEgressScl1TcamAdSbeCnt_f},
    {DsVlanXlateDefault0_t, EgrSclHashParityStatus_t, EgrSclHashParityStatus_dsVlanXlateDefault0SbeCnt_f},
    {DsVlanXlateDefault1_t, EgrSclHashParityStatus_t, EgrSclHashParityStatus_dsVlanXlateDefault1SbeCnt_f},
    {DsAcl0Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl0EgressSbeCnt_f},
    {DsAcl1Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl1EgressSbeCnt_f},
    {DsAcl2Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl2EgressSbeCnt_f},
    {DsAcl3Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl3EgressSbeCnt_f},
    {DsAcl4Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl4EgressSbeCnt_f},
    {DsAcl5Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl5EgressSbeCnt_f},
    {DsAcl6Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl6EgressSbeCnt_f},
    {DsAcl7Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl7EgressSbeCnt_f},
    {DsAcl8Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl8EgressSbeCnt_f},
    {DsAcl9Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl9EgressSbeCnt_f},
    {DsAcl10Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl10EgressSbeCnt_f},
    {DsAcl11Egress_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsAcl11EgressSbeCnt_f},
    {DsDestInterfaceProfile_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsDestInterfaceProfileSbeCnt_f},
    {DsDestPortAclCtl_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsDestPortAclCtlSbeCnt_f},
    {DsDestVlanProfile_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_dsDestVlanProfileSbeCnt_f},
    {MaxTblId_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_epeClaPolicingSopInfoRamSbeCnt_f},
    {EpeDestChanPolicerCfg_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_epeDestChanPolicerCfgSbeCnt_f},
    {EpeGlobalCoPPCfg_t, EpeAclOamParityStatus_t, EpeAclOamParityStatus_epeGlobalCoPPCfgSbeCnt_f},
    {MaxTblId_t, EpeHdrAdjParityStatus_t, EpeHdrAdjParityStatus_asyncBrDp0EpeSopDataFifoSbeCnt_f},
    {MaxTblId_t, EpeHdrAdjParityStatus_t, EpeHdrAdjParityStatus_asyncBrDp1EpeSopDataFifoSbeCnt_f},
    {DsEpeHeaderEditChanAqmConfig_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditChanAqmConfigSbeCnt_f},
    {DsEpeHeaderEditChanAqmLen_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditChanAqmLenSbeCnt_f},
    {DsEpeHeaderEditChanAqmThrd_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditChanAqmThrdSbeCnt_f},
    {DsEpeHeaderEditChanLoadWeight_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditChanLoadWeightSbeCnt_f},
    {DsEpeHeaderEditChannelPortMap_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditChannelPortMapSbeCnt_f},
    {DsEpeHeaderEditDreDiscountShift_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsEpeHeaderEditDreDiscountShiftSbeCnt_f},
    {DsPortLinkAgg_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_dsPortLinkAggSbeCnt_f},
    {EpeHdrEditAsyncToSchDp0CtlFifo_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_epeHdrEditAsyncToSchDp0InfoFifoSbeCnt_f},
    {EpeHdrEditAsyncToSchDp1CtlFifo_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_epeHdrEditAsyncToSchDp1InfoFifoSbeCnt_f},
    {EpeHdrEditFrOamPRFifo_t, EpeHdrEditParityStatus_t, EpeHdrEditParityStatus_epeHdrEditFrOamPRFifoSbeCnt_f},
    {DsDestChannel_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsDestChannelSbeCnt_f},
    {DsDestPortLoadMetric_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsDestPortLoadMetricSbeCnt_f},
    {DsEgressPortMac_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsEgressPortMacSbeCnt_f},
    {DsEgressVsi_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsEgressVsiSbeCnt_f},
    {DsFlexEditInsertHeaderTemplate_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsFlexEditInsertHeaderTemplateSbeCnt_f},
    {DsFlexEditTemplate3_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsFlexEditTemplate3SbeCnt_f},
    {DsIntExtRewriteProfile_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsIntExtRewriteProfileSbeCnt_f},
    {DsIntSessionEdit_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsIntSessionEditSbeCnt_f},
    {DsL2Edit6WOuter_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsL2Edit6WOuterSbeCnt_f},
    {DsMplsEvpnEsLabel_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsMplsEvpnEsLabelSbeCnt_f},
    {DsNshEditContextHeaderProfile_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsNshEditContextHeaderProfileSbeCnt_f},
    {DsPathViewDstMap_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsPathViewDstMapSbeCnt_f},
    {DsPathViewSrcMap_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsPathViewSrcMapSbeCnt_f},
    {DsXEditFlexAluProfile_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsXEditFlexAluProfileSbeCnt_f},
    {DsXEditInsertHeaderTemplate_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_dsXEditInsertHeaderTemplateSbeCnt_f},
    {HdrProcXEditResultFifo_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_hdrProcXEditResultFifoSbeCnt_f},
    {HdrProcXEditTrackFifo_t, EpeHdrProcParityStatus_t, EpeHdrProcParityStatus_hdrProcXEditTrackFifoSbeCnt_f},
    {DsDestInterface_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsDestInterfaceSbeCnt_f},
    {DsDestPort_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsDestPortSbeCnt_f},
    {DsDestStpState_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsDestStpStateSbeCnt_f},
    {DsDestVlan_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsDestVlanSbeCnt_f},
    {DsDestVlanStatus_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsDestVlanStatusSbeCnt_f},
    {DsEgressLogicDestPort_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsEgressLogicDestPortSbeCnt_f},
    {DsEgressRouterMac_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsEgressRouterMacSbeCnt_f},
    {DsEgressVlanRangeProfile_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsEgressVlanRangeProfileSbeCnt_f},
    {DsEpeApsBridge_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsEpeApsBridgeSbeCnt_f},
    {DsEpeApsProtectionEn_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsEpeApsProtectionEnSbeCnt_f},
    {DsGlbDestPort_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsGlbDestPortSbeCnt_f},
    {DsPortIsolation_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsPortIsolationSbeCnt_f},
    {DsVlanTagBitMap_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_dsVlanTagBitMapSbeCnt_f},
    {ENHBypassInsideFifo_t, EpeNextHopParityStatus_t, EpeNextHopParityStatus_eNHBypassInsideFifoSbeCnt_f},
    {EpeScheduleCalendar0Ram_t, EpeScheduleParityStatus_t, EpeScheduleParityStatus_epeScheduleCalendar0RamSbeCnt_f},
    {EpeScheduleCalendar1Ram_t, EpeScheduleParityStatus_t, EpeScheduleParityStatus_epeScheduleCalendar1RamSbeCnt_f},
    {DsMacLimitCount_t, FibAccParityStatus_t, FibAccParityStatus_dsMacLimitCountSbeCnt_f},
    {DsMacLimitThreshold_t, FibAccParityStatus_t, FibAccParityStatus_dsMacLimitThresholdSbeCnt_f},
    {FibAccIpeLearnReq0Fifo_t, FibAccParityStatus_t, FibAccParityStatus_fibAccIpeLearnReq0FifoSbeCnt_f},
    {FibAccIpeLearnReq1Fifo_t, FibAccParityStatus_t, FibAccParityStatus_fibAccIpeLearnReq1FifoSbeCnt_f},
    {FibAccIpeLearnReq2Fifo_t, FibAccParityStatus_t, FibAccParityStatus_fibAccIpeLearnReq2FifoSbeCnt_f},
    {FibAccIpeLearnReq3Fifo_t, FibAccParityStatus_t, FibAccParityStatus_fibAccIpeLearnReq3FifoSbeCnt_f},
    {DsIpfixConfig_t, FlowAccAdParityStatus_t, FlowAccAdParityStatus_dsIpfixConfigSbeCnt_f},
    {DsIpfixSessionRecordMem_t, FlowAccAdParityStatus_t, FlowAccAdParityStatus_dsIpfixSessionRecordMemSbeCnt_f},
    {FlowAccPpAdMiscInfo_t, FlowAccAdParityStatus_t, FlowAccAdParityStatus_flowAccPpAdMiscInfoSbeCnt_f},
    {FlowAccToDmaFifo_t, FlowAccAdParityStatus_t, FlowAccAdParityStatus_flowAccToDmaFifoSbeCnt_f},
    {DsIpfixSessionMmuRecordMem_t, FlowAccMmuParityStatus_t, FlowAccMmuParityStatus_dsIpfixSessionMmuRecordMemSbeCnt_f},
    {FlowAccMmuPIFifo_t, FlowAccMmuParityStatus_t, FlowAccMmuParityStatus_flowAccMmuPIFifoSbeCnt_f},
    {DsIpfixAlu16Profile0_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAlu16Profile0SbeCnt_f},
    {DsIpfixAlu16Profile1_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAlu16Profile1SbeCnt_f},
    {DsIpfixAlu16Profile2_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAlu16Profile2SbeCnt_f},
    {DsIpfixAlu16Profile3_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAlu16Profile3SbeCnt_f},
    {DsIpfixAluProfile0_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAluProfile0SbeCnt_f},
    {DsIpfixAluProfile1_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAluProfile1SbeCnt_f},
    {DsIpfixAluProfile2_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAluProfile2SbeCnt_f},
    {DsIpfixAluProfile3_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixAluProfile3SbeCnt_f},
    {DsIpfixSamplingCount_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_dsIpfixSamplingCountSbeCnt_f},
    {FlowAccKeyCache_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_flowAccKeyCacheSbeCnt_f},
    {IpfixEngineDiscardMapCtl_t, FlowAccPpParityStatus_t, FlowAccPpParityStatus_ipfixEngineDiscardMapCtlSbeCnt_f},
    {DsStats0_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats0SbeCnt_f},
    {DsStats1_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats1SbeCnt_f},
    {DsStats2_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats2SbeCnt_f},
    {DsStats3_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats3SbeCnt_f},
    {DsStats4_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats4SbeCnt_f},
    {DsStats5_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats5SbeCnt_f},
    {DsStats6_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats6SbeCnt_f},
    {DsStats7_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats7SbeCnt_f},
    {DsStats8_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats8SbeCnt_f},
    {DsStats9_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats9SbeCnt_f},
    {DsStats10_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats10SbeCnt_f},
    {DsStats11_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats11SbeCnt_f},
    {DsStats12_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats12SbeCnt_f},
    {DsStats13_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats13SbeCnt_f},
    {DsStats14_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats14SbeCnt_f},
    {DsStats15_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStats15SbeCnt_f},
    {DsStatsEgressACL0_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL0SbeCnt_f},
    {DsStatsEgressACL1_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL1SbeCnt_f},
    {DsStatsEgressACL2_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL2SbeCnt_f},
    {DsStatsEgressACL3_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL3SbeCnt_f},
    {DsStatsEgressACL4_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL4SbeCnt_f},
    {DsStatsEgressACL5_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL5SbeCnt_f},
    {DsStatsEgressACL6_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL6SbeCnt_f},
    {DsStatsEgressACL7_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL7SbeCnt_f},
    {DsStatsEgressACL8_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL8SbeCnt_f},
    {DsStatsEgressACL9_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL9SbeCnt_f},
    {DsStatsEgressACL10_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL10SbeCnt_f},
    {DsStatsEgressACL11_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsEgressACL11SbeCnt_f},
    {DsStatsIngressACL0_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL0SbeCnt_f},
    {DsStatsIngressACL1_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL1SbeCnt_f},
    {DsStatsIngressACL2_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL2SbeCnt_f},
    {DsStatsIngressACL3_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL3SbeCnt_f},
    {DsStatsIngressACL4_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL4SbeCnt_f},
    {DsStatsIngressACL5_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL5SbeCnt_f},
    {DsStatsIngressACL6_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL6SbeCnt_f},
    {DsStatsIngressACL7_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL7SbeCnt_f},
    {DsStatsIngressACL8_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL8SbeCnt_f},
    {DsStatsIngressACL9_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL9SbeCnt_f},
    {DsStatsIngressACL10_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL10SbeCnt_f},
    {DsStatsIngressACL11_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL11SbeCnt_f},
    {DsStatsIngressACL12_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL12SbeCnt_f},
    {DsStatsIngressACL13_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL13SbeCnt_f},
    {DsStatsIngressACL14_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL14SbeCnt_f},
    {DsStatsIngressACL15_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL15SbeCnt_f},
    {DsStatsIngressACL16_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL16SbeCnt_f},
    {DsStatsIngressACL17_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL17SbeCnt_f},
    {DsStatsIngressACL18_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL18SbeCnt_f},
    {DsStatsIngressACL19_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL19SbeCnt_f},
    {DsStatsIngressACL20_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL20SbeCnt_f},
    {DsStatsIngressACL21_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL21SbeCnt_f},
    {DsStatsIngressACL22_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL22SbeCnt_f},
    {DsStatsIngressACL23_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_dsStatsIngressACL23SbeCnt_f},
    {MaxTblId_t, GlobalStatsParityStatus_t, GlobalStatsParityStatus_globalStatsSatuAddrFifoSbeCnt_f},
    {DsAcl0Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl0IngressSbeCnt_f},
    {DsAcl1Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl1IngressSbeCnt_f},
    {DsAcl2Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl2IngressSbeCnt_f},
    {DsAcl3Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl3IngressSbeCnt_f},
    {DsAcl4Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl4IngressSbeCnt_f},
    {DsAcl5Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl5IngressSbeCnt_f},
    {DsAcl6Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl6IngressSbeCnt_f},
    {DsAcl7Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl7IngressSbeCnt_f},
    {DsAcl8Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl8IngressSbeCnt_f},
    {DsAcl9Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl9IngressSbeCnt_f},
    {DsAcl10Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl10IngressSbeCnt_f},
    {DsAcl11Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl11IngressSbeCnt_f},
    {DsAcl12Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl12IngressSbeCnt_f},
    {DsAcl13Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl13IngressSbeCnt_f},
    {DsAcl14Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl14IngressSbeCnt_f},
    {DsAcl15Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl15IngressSbeCnt_f},
    {DsAcl16Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl16IngressSbeCnt_f},
    {DsAcl17Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl17IngressSbeCnt_f},
    {DsAcl18Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl18IngressSbeCnt_f},
    {DsAcl19Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl19IngressSbeCnt_f},
    {DsAcl20Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl20IngressSbeCnt_f},
    {DsAcl21Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl21IngressSbeCnt_f},
    {DsAcl22Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl22IngressSbeCnt_f},
    {DsAcl23Ingress_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAcl23IngressSbeCnt_f},
    {DsAclVlanActionProfile_t, IpeAclParityStatus_t, IpeAclParityStatus_dsAclVlanActionProfileSbeCnt_f},
    {DsCategoryIdPairHashLeftAd_t, IpeAclParityStatus_t, IpeAclParityStatus_dsCategoryIdPairHashLeftAdSbeCnt_f},
    {DsCategoryIdPairHashLeftKey_t, IpeAclParityStatus_t, IpeAclParityStatus_dsCategoryIdPairHashLeftKeySbeCnt_f},
    {DsCategoryIdPairHashRightAd_t, IpeAclParityStatus_t, IpeAclParityStatus_dsCategoryIdPairHashRightAdSbeCnt_f},
    {DsCategoryIdPairHashRightKey_t, IpeAclParityStatus_t, IpeAclParityStatus_dsCategoryIdPairHashRightKeySbeCnt_f},
    {DsCategoryIdPairTcamAd_t, IpeAclParityStatus_t, IpeAclParityStatus_dsCategoryIdPairTcamAdSbeCnt_f},
    {DsDestMapProfileUc_t, IpeAclParityStatus_t, IpeAclParityStatus_dsDestMapProfileUcSbeCnt_f},
    {DsIpeApsBridge_t, IpeAclParityStatus_t, IpeAclParityStatus_dsIpeApsBridgeSbeCnt_f},
    {DsIpeApsProtectionEn_t, IpeAclParityStatus_t, IpeAclParityStatus_dsIpeApsProtectionEnSbeCnt_f},
    {DsSrcChannel_t, IpeAclParityStatus_t, IpeAclParityStatus_dsSrcChannelSbeCnt_f},
    {DsSrcInterfaceProfile_t, IpeAclParityStatus_t, IpeAclParityStatus_dsSrcInterfaceProfileSbeCnt_f},
    {DsSrcPortAclCtl_t, IpeAclParityStatus_t, IpeAclParityStatus_dsSrcPortAclCtlSbeCnt_f},
    {DsSrcVlanProfile_t, IpeAclParityStatus_t, IpeAclParityStatus_dsSrcVlanProfileSbeCnt_f},
    {IpeFwdExcepGroupMap_t, IpeAclParityStatus_t, IpeAclParityStatus_ipeFwdExcepGroupMapSbeCnt_f},
    {DsCFlexSrcPortBlockMask_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsCFlexSrcPortBlockMaskSbeCnt_f},
    {DsChannelToEcmpGroupMap_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsChannelToEcmpGroupMapSbeCnt_f},
    {DsIngressLogicDestPort_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIngressLogicDestPortSbeCnt_f},
    {DsIpeFwdDestPortMap_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIpeFwdDestPortMapSbeCnt_f},
    {DsIpeFwdDestSubQueMap_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIpeFwdDestSubQueMapSbeCnt_f},
    {DsIpePhbMutationCosMap_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIpePhbMutationCosMapSbeCnt_f},
    {DsIpePhbMutationDscpMap_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIpePhbMutationDscpMapSbeCnt_f},
    {DsIpePolicerGroup_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsIpePolicerGroupSbeCnt_f},
    {DsPortBasedHashProfile0_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsPortBasedHashProfile0SbeCnt_f},
    {DsResrcMgmtRxPrioMapMc_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsResrcMgmtRxPrioMapMcSbeCnt_f},
    {DsResrcMgmtRxPrioMapUc_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsResrcMgmtRxPrioMapUcSbeCnt_f},
    {DsResrcMgmtTxPrioMapUc_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsResrcMgmtTxPrioMapUcSbeCnt_f},
    {DsUcQWriteCFlexDstChannelBlockMask_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsUcQWriteCFlexDstChannelBlockMaskSbeCnt_f},
    {DsUcQWritePortBlockMask_t, IpeFwdParityStatus_t, IpeFwdParityStatus_dsUcQWritePortBlockMaskSbeCnt_f},
    {AsyncIpeHdrAdjDp0EopInputFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_asyncIpeHdrAdjDp0EopInputFifoSbeCnt_f},
    {AsyncIpeHdrAdjDp0InputFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_asyncIpeHdrAdjDp0InputFifoSbeCnt_f},
    {AsyncIpeHdrAdjDp1EopInputFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_asyncIpeHdrAdjDp1EopInputFifoSbeCnt_f},
    {AsyncIpeHdrAdjDp1InputFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_asyncIpeHdrAdjDp1InputFifoSbeCnt_f},
    {DsPhyPortExt_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsPhyPortExtSbeCnt_f},
    {DsPhyPort_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsPhyPortSbeCnt_f},
    {DsRouterMacTcamAd_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsRouterMacTcamAdSbeCnt_f},
    {DsVlanActionProfile_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsVlanActionProfileSbeCnt_f},
    {DsVlanRangeProfile1_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsVlanRangeProfile1SbeCnt_f},
    {DsVlanRangeProfile_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_dsVlanRangeProfileSbeCnt_f},
    {IpeHdrAdjHdrDataHoldFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_ipeHdrAdjHdrDataHoldFifoSbeCnt_f},
    {UserIdWaitSclEngineFifo_t, IpeHdrAdjParityStatus_t, IpeHdrAdjParityStatus_userIdWaitSclEngineFifoSbeCnt_f},
    {DsSrcInterface_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsSrcInterfaceSbeCnt_f},
    {DsSrcPort_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsSrcPortSbeCnt_f},
    {DsSrcStpState_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsSrcStpStateSbeCnt_f},
    {DsSrcVlan_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsSrcVlanSbeCnt_f},
    {DsSrcVlanStatus_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsSrcVlanStatusSbeCnt_f},
    {DsVlan2Ptr_t, IpeIntfMapParityStatus_t, IpeIntfMapParityStatus_dsVlan2PtrSbeCnt_f},
    {DsRouterMacInner_t, IpeLkupMgrParityStatus_t, IpeLkupMgrParityStatus_dsRouterMacInnerSbeCnt_f},
    {DsBidiPimGroup_t, IpePktProcParityStatus_t, IpePktProcParityStatus_dsBidiPimGroupSbeCnt_f},
    {DsRpf_t, IpePktProcParityStatus_t, IpePktProcParityStatus_dsRpfSbeCnt_f},
    {DsVsi_t, IpePktProcParityStatus_t, IpePktProcParityStatus_dsVsiSbeCnt_f},
    {IpePhbDscpMap_t, IpePktProcParityStatus_t, IpePktProcParityStatus_ipePhbDscpMapSbeCnt_f},
    {CflexLagLinkSelfHealingSet_t, LinkAggParityStatus_t, LinkAggParityStatus_cflexLagLinkSelfHealingSetSbeCnt_f},
    {DsLagDlbFlowSetTable_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLagDlbFlowSetTableSbeCnt_f},
    {DsLinkAggregateChannelGroup_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateChannelGroupSbeCnt_f},
    {DsLinkAggregateChannelMember_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateChannelMemberSbeCnt_f},
    {DsLinkAggregateChannelMemberSet_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateChannelMemberSetSbeCnt_f},
    {DsLinkAggregateGroup_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateGroupSbeCnt_f},
    {DsLinkAggregateMember_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateMemberSbeCnt_f},
    {DsLinkAggregateMemberSet_t, LinkAggParityStatus_t, LinkAggParityStatus_dsLinkAggregateMemberSetSbeCnt_f},
    {DsPortBasedHashProfile1_t, LinkAggParityStatus_t, LinkAggParityStatus_dsPortBasedHashProfile1SbeCnt_f},
    {DsPortChannelLag_t, LinkAggParityStatus_t, LinkAggParityStatus_dsPortChannelLagSbeCnt_f},
    {DsSgmacMap_t, LinkAggParityStatus_t, LinkAggParityStatus_dsSgmacMapSbeCnt_f},
    {PortLagLinkSelfHealingSet_t, LinkAggParityStatus_t, LinkAggParityStatus_portLagLinkSelfHealingSetSbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd0SbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd1SbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd2SbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd3SbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd4SbeCnt_f},
    {MaxTblId_t, LpmTcamParityStatus_t, LpmTcamParityStatus_lpmTcamAd5SbeCnt_f},
    {McuMem_t, McpuDebugStats_t, McpuDebugStats_mcuMemSbeCnt_f},
    {MetFreeAddrFifo0_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo0SbeCnt_f},
    {MetFreeAddrFifo1_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo1SbeCnt_f},
    {MetFreeAddrFifo2_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo2SbeCnt_f},
    {MetFreeAddrFifo3_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo3SbeCnt_f},
    {MetFreeAddrFifo4_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo4SbeCnt_f},
    {MetFreeAddrFifo5_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo5SbeCnt_f},
    {MetFreeAddrFifo6_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo6SbeCnt_f},
    {MetFreeAddrFifo7_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo7SbeCnt_f},
    {MetFreeAddrFifo8_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo8SbeCnt_f},
    {MetFreeAddrFifo9_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo9SbeCnt_f},
    {MetFreeAddrFifo10_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo10SbeCnt_f},
    {MetFreeAddrFifo11_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo11SbeCnt_f},
    {MetFreeAddrFifo12_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo12SbeCnt_f},
    {MetFreeAddrFifo13_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo13SbeCnt_f},
    {MetFreeAddrFifo14_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo14SbeCnt_f},
    {MetFreeAddrFifo15_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo15SbeCnt_f},
    {MetFreeAddrFifo16_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo16SbeCnt_f},
    {MetFreeAddrFifo17_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo17SbeCnt_f},
    {MetFreeAddrFifo18_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo18SbeCnt_f},
    {MetFreeAddrFifo19_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo19SbeCnt_f},
    {MetFreeAddrFifo20_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo20SbeCnt_f},
    {MetFreeAddrFifo21_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo21SbeCnt_f},
    {MetFreeAddrFifo22_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo22SbeCnt_f},
    {MetFreeAddrFifo23_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo23SbeCnt_f},
    {MetFreeAddrFifo24_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo24SbeCnt_f},
    {MetFreeAddrFifo25_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo25SbeCnt_f},
    {MetFreeAddrFifo26_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo26SbeCnt_f},
    {MetFreeAddrFifo27_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo27SbeCnt_f},
    {MetFreeAddrFifo28_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo28SbeCnt_f},
    {MetFreeAddrFifo29_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo29SbeCnt_f},
    {MetFreeAddrFifo30_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo30SbeCnt_f},
    {MetFreeAddrFifo31_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo31SbeCnt_f},
    {MetFreeAddrFifo32_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo32SbeCnt_f},
    {MetFreeAddrFifo33_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo33SbeCnt_f},
    {MetFreeAddrFifo34_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo34SbeCnt_f},
    {MetFreeAddrFifo35_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo35SbeCnt_f},
    {MetFreeAddrFifo36_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo36SbeCnt_f},
    {MetFreeAddrFifo37_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo37SbeCnt_f},
    {MetFreeAddrFifo38_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo38SbeCnt_f},
    {MetFreeAddrFifo39_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo39SbeCnt_f},
    {MetFreeAddrFifo40_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo40SbeCnt_f},
    {MetFreeAddrFifo41_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo41SbeCnt_f},
    {MetFreeAddrFifo42_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo42SbeCnt_f},
    {MetFreeAddrFifo43_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo43SbeCnt_f},
    {MetFreeAddrFifo44_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo44SbeCnt_f},
    {MetFreeAddrFifo45_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo45SbeCnt_f},
    {MetFreeAddrFifo46_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo46SbeCnt_f},
    {MetFreeAddrFifo47_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo47SbeCnt_f},
    {MetFreeAddrFifo48_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo48SbeCnt_f},
    {MetFreeAddrFifo49_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo49SbeCnt_f},
    {MetFreeAddrFifo50_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo50SbeCnt_f},
    {MetFreeAddrFifo51_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo51SbeCnt_f},
    {MetFreeAddrFifo52_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo52SbeCnt_f},
    {MetFreeAddrFifo53_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo53SbeCnt_f},
    {MetFreeAddrFifo54_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo54SbeCnt_f},
    {MetFreeAddrFifo55_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo55SbeCnt_f},
    {MetFreeAddrFifo56_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo56SbeCnt_f},
    {MetFreeAddrFifo57_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo57SbeCnt_f},
    {MetFreeAddrFifo58_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo58SbeCnt_f},
    {MetFreeAddrFifo59_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo59SbeCnt_f},
    {MetFreeAddrFifo60_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo60SbeCnt_f},
    {MetFreeAddrFifo61_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo61SbeCnt_f},
    {MetFreeAddrFifo62_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo62SbeCnt_f},
    {MetFreeAddrFifo63_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_metFreeAddrFifo63SbeCnt_f},
    {MsMetReplicatedCnt0_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt0SbeCnt_f},
    {MsMetReplicatedCnt1_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt1SbeCnt_f},
    {MsMetReplicatedCnt2_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt2SbeCnt_f},
    {MsMetReplicatedCnt3_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt3SbeCnt_f},
    {MsMetReplicatedCnt4_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt4SbeCnt_f},
    {MsMetReplicatedCnt5_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt5SbeCnt_f},
    {MsMetReplicatedCnt6_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt6SbeCnt_f},
    {MsMetReplicatedCnt7_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt7SbeCnt_f},
    {MsMetReplicatedCnt8_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt8SbeCnt_f},
    {MsMetReplicatedCnt9_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt9SbeCnt_f},
    {MsMetReplicatedCnt10_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt10SbeCnt_f},
    {MsMetReplicatedCnt11_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt11SbeCnt_f},
    {MsMetReplicatedCnt12_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt12SbeCnt_f},
    {MsMetReplicatedCnt13_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt13SbeCnt_f},
    {MsMetReplicatedCnt14_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt14SbeCnt_f},
    {MsMetReplicatedCnt15_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt15SbeCnt_f},
    {MsMetReplicatedCnt16_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt16SbeCnt_f},
    {MsMetReplicatedCnt17_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt17SbeCnt_f},
    {MsMetReplicatedCnt18_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt18SbeCnt_f},
    {MsMetReplicatedCnt19_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt19SbeCnt_f},
    {MsMetReplicatedCnt20_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt20SbeCnt_f},
    {MsMetReplicatedCnt21_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt21SbeCnt_f},
    {MsMetReplicatedCnt22_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt22SbeCnt_f},
    {MsMetReplicatedCnt23_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt23SbeCnt_f},
    {MsMetReplicatedCnt24_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt24SbeCnt_f},
    {MsMetReplicatedCnt25_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt25SbeCnt_f},
    {MsMetReplicatedCnt26_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt26SbeCnt_f},
    {MsMetReplicatedCnt27_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt27SbeCnt_f},
    {MsMetReplicatedCnt28_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt28SbeCnt_f},
    {MsMetReplicatedCnt29_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt29SbeCnt_f},
    {MsMetReplicatedCnt30_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt30SbeCnt_f},
    {MsMetReplicatedCnt31_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt31SbeCnt_f},
    {MsMetReplicatedCnt32_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt32SbeCnt_f},
    {MsMetReplicatedCnt33_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt33SbeCnt_f},
    {MsMetReplicatedCnt34_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt34SbeCnt_f},
    {MsMetReplicatedCnt35_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt35SbeCnt_f},
    {MsMetReplicatedCnt36_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt36SbeCnt_f},
    {MsMetReplicatedCnt37_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt37SbeCnt_f},
    {MsMetReplicatedCnt38_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt38SbeCnt_f},
    {MsMetReplicatedCnt39_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt39SbeCnt_f},
    {MsMetReplicatedCnt40_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt40SbeCnt_f},
    {MsMetReplicatedCnt41_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt41SbeCnt_f},
    {MsMetReplicatedCnt42_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt42SbeCnt_f},
    {MsMetReplicatedCnt43_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt43SbeCnt_f},
    {MsMetReplicatedCnt44_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt44SbeCnt_f},
    {MsMetReplicatedCnt45_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt45SbeCnt_f},
    {MsMetReplicatedCnt46_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt46SbeCnt_f},
    {MsMetReplicatedCnt47_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt47SbeCnt_f},
    {MsMetReplicatedCnt48_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt48SbeCnt_f},
    {MsMetReplicatedCnt49_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt49SbeCnt_f},
    {MsMetReplicatedCnt50_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt50SbeCnt_f},
    {MsMetReplicatedCnt51_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt51SbeCnt_f},
    {MsMetReplicatedCnt52_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt52SbeCnt_f},
    {MsMetReplicatedCnt53_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt53SbeCnt_f},
    {MsMetReplicatedCnt54_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt54SbeCnt_f},
    {MsMetReplicatedCnt55_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt55SbeCnt_f},
    {MsMetReplicatedCnt56_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt56SbeCnt_f},
    {MsMetReplicatedCnt57_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt57SbeCnt_f},
    {MsMetReplicatedCnt58_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt58SbeCnt_f},
    {MsMetReplicatedCnt59_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt59SbeCnt_f},
    {MsMetReplicatedCnt60_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt60SbeCnt_f},
    {MsMetReplicatedCnt61_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt61SbeCnt_f},
    {MsMetReplicatedCnt62_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt62SbeCnt_f},
    {MsMetReplicatedCnt63_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetReplicatedCnt63SbeCnt_f},
    {MsMetWriteReq0Fifo_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetWriteReq0FifoSbeCnt_f},
    {MsMetWriteReq1Fifo_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetWriteReq1FifoSbeCnt_f},
    {MsMetWriteReq2Fifo_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetWriteReq2FifoSbeCnt_f},
    {MsMetWriteReq3Fifo_t, MetFifoMsgConflictWrParityStatus_t, MetFifoMsgConflictWrParityStatus_msMetWriteReq3FifoSbeCnt_f},
    {BufStoreMcFreePtrRam0_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam0SbeCnt_f},
    {BufStoreMcFreePtrRam1_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam1SbeCnt_f},
    {BufStoreMcFreePtrRam2_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam2SbeCnt_f},
    {BufStoreMcFreePtrRam3_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam3SbeCnt_f},
    {BufStoreMcFreePtrRam4_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam4SbeCnt_f},
    {BufStoreMcFreePtrRam5_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam5SbeCnt_f},
    {BufStoreMcFreePtrRam6_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam6SbeCnt_f},
    {BufStoreMcFreePtrRam7_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam7SbeCnt_f},
    {BufStoreMcFreePtrRam8_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam8SbeCnt_f},
    {BufStoreMcFreePtrRam9_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam9SbeCnt_f},
    {BufStoreMcFreePtrRam10_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam10SbeCnt_f},
    {BufStoreMcFreePtrRam11_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam11SbeCnt_f},
    {BufStoreMcFreePtrRam12_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam12SbeCnt_f},
    {BufStoreMcFreePtrRam13_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam13SbeCnt_f},
    {BufStoreMcFreePtrRam14_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam14SbeCnt_f},
    {BufStoreMcFreePtrRam15_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam15SbeCnt_f},
    {BufStoreMcFreePtrRam16_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam16SbeCnt_f},
    {BufStoreMcFreePtrRam17_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam17SbeCnt_f},
    {BufStoreMcFreePtrRam18_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam18SbeCnt_f},
    {BufStoreMcFreePtrRam19_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam19SbeCnt_f},
    {BufStoreMcFreePtrRam20_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam20SbeCnt_f},
    {BufStoreMcFreePtrRam21_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam21SbeCnt_f},
    {BufStoreMcFreePtrRam22_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam22SbeCnt_f},
    {BufStoreMcFreePtrRam23_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam23SbeCnt_f},
    {BufStoreMcFreePtrRam24_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam24SbeCnt_f},
    {BufStoreMcFreePtrRam25_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam25SbeCnt_f},
    {BufStoreMcFreePtrRam26_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam26SbeCnt_f},
    {BufStoreMcFreePtrRam27_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam27SbeCnt_f},
    {BufStoreMcFreePtrRam28_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam28SbeCnt_f},
    {BufStoreMcFreePtrRam29_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam29SbeCnt_f},
    {BufStoreMcFreePtrRam30_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam30SbeCnt_f},
    {BufStoreMcFreePtrRam31_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam31SbeCnt_f},
    {BufStoreMcFreePtrRam32_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam32SbeCnt_f},
    {BufStoreMcFreePtrRam33_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam33SbeCnt_f},
    {BufStoreMcFreePtrRam34_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam34SbeCnt_f},
    {BufStoreMcFreePtrRam35_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam35SbeCnt_f},
    {BufStoreMcFreePtrRam36_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam36SbeCnt_f},
    {BufStoreMcFreePtrRam37_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam37SbeCnt_f},
    {BufStoreMcFreePtrRam38_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam38SbeCnt_f},
    {BufStoreMcFreePtrRam39_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam39SbeCnt_f},
    {BufStoreMcFreePtrRam40_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam40SbeCnt_f},
    {BufStoreMcFreePtrRam41_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam41SbeCnt_f},
    {BufStoreMcFreePtrRam42_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam42SbeCnt_f},
    {BufStoreMcFreePtrRam43_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam43SbeCnt_f},
    {BufStoreMcFreePtrRam44_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam44SbeCnt_f},
    {BufStoreMcFreePtrRam45_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam45SbeCnt_f},
    {BufStoreMcFreePtrRam46_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam46SbeCnt_f},
    {BufStoreMcFreePtrRam47_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam47SbeCnt_f},
    {BufStoreMcFreePtrRam48_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam48SbeCnt_f},
    {BufStoreMcFreePtrRam49_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam49SbeCnt_f},
    {BufStoreMcFreePtrRam50_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam50SbeCnt_f},
    {BufStoreMcFreePtrRam51_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam51SbeCnt_f},
    {BufStoreMcFreePtrRam52_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam52SbeCnt_f},
    {BufStoreMcFreePtrRam53_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam53SbeCnt_f},
    {BufStoreMcFreePtrRam54_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam54SbeCnt_f},
    {BufStoreMcFreePtrRam55_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam55SbeCnt_f},
    {BufStoreMcFreePtrRam56_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam56SbeCnt_f},
    {BufStoreMcFreePtrRam57_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam57SbeCnt_f},
    {BufStoreMcFreePtrRam58_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam58SbeCnt_f},
    {BufStoreMcFreePtrRam59_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam59SbeCnt_f},
    {BufStoreMcFreePtrRam60_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam60SbeCnt_f},
    {BufStoreMcFreePtrRam61_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam61SbeCnt_f},
    {BufStoreMcFreePtrRam62_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam62SbeCnt_f},
    {BufStoreMcFreePtrRam63_t, BufStoreProcMcParityStatus_t, BufStoreProcMcParityStatus_bufStoreMcFreePtrRam63SbeCnt_f},
    {MaxTblId_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice0FreeLinkListHeadPtrFifoSbeCnt_f},
    {Slice0LinkList_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice0LinkListSbeCnt_f},
    {MaxTblId_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice1FreeLinkListHeadPtrFifoSbeCnt_f},
    {Slice1LinkList_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice1LinkListSbeCnt_f},
    {MaxTblId_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice2FreeLinkListHeadPtrFifoSbeCnt_f},
    {Slice2LinkList_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice2LinkListSbeCnt_f},
    {MaxTblId_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice3FreeLinkListHeadPtrFifoSbeCnt_f},
    {Slice3LinkList_t, MetFifoMsgParityStatus_t, MetFifoMsgParityStatus_slice3LinkListSbeCnt_f},
    {DsPreMetRepHash_t, MetFifoMsgPreMetParityStatus_t, MetFifoMsgPreMetParityStatus_dsPreMetRepHashSbeCnt_f},
    {DsPreMetRepInit_t, MetFifoMsgPreMetParityStatus_t, MetFifoMsgPreMetParityStatus_dsPreMetRepInitSbeCnt_f},
    {DsSrcSgmacGroup_t, MetFifoMsgPreMetParityStatus_t, MetFifoMsgPreMetParityStatus_dsSrcSgmacGroupSbeCnt_f},
    {DsMetExcpPortLagLinkSelfHealingSet_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_dsMetExcpPortLagLinkSelfHealingSetSbeCnt_f},
    {DsMetFifoExcpLinkAggregation_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_dsMetFifoExcpLinkAggregationSbeCnt_f},
    {DsMetFifoExcp_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_dsMetFifoExcpSbeCnt_f},
    {DsMetFifoExcpSgmacMap_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_dsMetFifoExcpSgmacMapSbeCnt_f},
    {ExcpLoopMsgReqFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_excpLoopMsgReqFifoSbeCnt_f},
    {ExcpMsEnqueueFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_excpMsEnqueueFifoSbeCnt_f},
    {LogLoopMsgReqFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_logLoopMsgReqFifoSbeCnt_f},
    {LogMsEnqueueFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_logMsEnqueueFifoSbeCnt_f},
    {McastEnqueueMsgFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_mcastEnqueueMsgFifoSbeCnt_f},
    {MetMcast0LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast0LoopFifoSbeCnt_f},
    {MetMcast1LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast1LoopFifoSbeCnt_f},
    {MetMcast2LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast2LoopFifoSbeCnt_f},
    {MetMcast3LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast3LoopFifoSbeCnt_f},
    {MetMcast4LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast4LoopFifoSbeCnt_f},
    {MetMcast5LoopFifo_t, MetFifoProcParityStatus_t, MetFifoProcParityStatus_metMcast5LoopFifoSbeCnt_f},
    {MetRcdMem0_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem0SbeCnt_f},
    {MetRcdMem1_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem1SbeCnt_f},
    {MetRcdMem2_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem2SbeCnt_f},
    {MetRcdMem3_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem3SbeCnt_f},
    {MetRcdMem4_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem4SbeCnt_f},
    {MetRcdMem5_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem5SbeCnt_f},
    {MetRcdMem6_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem6SbeCnt_f},
    {MetRcdMem7_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem7SbeCnt_f},
    {MetRcdMem8_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem8SbeCnt_f},
    {MetRcdMem9_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem9SbeCnt_f},
    {MetRcdMem10_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem10SbeCnt_f},
    {MetRcdMem11_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem11SbeCnt_f},
    {MetRcdMem12_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem12SbeCnt_f},
    {MetRcdMem13_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem13SbeCnt_f},
    {MetRcdMem14_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem14SbeCnt_f},
    {MetRcdMem15_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem15SbeCnt_f},
    {MetRcdMem16_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem16SbeCnt_f},
    {MetRcdMem17_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem17SbeCnt_f},
    {MetRcdMem18_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem18SbeCnt_f},
    {MetRcdMem19_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem19SbeCnt_f},
    {MetRcdMem20_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem20SbeCnt_f},
    {MetRcdMem21_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem21SbeCnt_f},
    {MetRcdMem22_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem22SbeCnt_f},
    {MetRcdMem23_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem23SbeCnt_f},
    {MetRcdMem24_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem24SbeCnt_f},
    {MetRcdMem25_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem25SbeCnt_f},
    {MetRcdMem26_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem26SbeCnt_f},
    {MetRcdMem27_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem27SbeCnt_f},
    {MetRcdMem28_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem28SbeCnt_f},
    {MetRcdMem29_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem29SbeCnt_f},
    {MetRcdMem30_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem30SbeCnt_f},
    {MetRcdMem31_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem31SbeCnt_f},
    {MetRcdMem32_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem32SbeCnt_f},
    {MetRcdMem33_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem33SbeCnt_f},
    {MetRcdMem34_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem34SbeCnt_f},
    {MetRcdMem35_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem35SbeCnt_f},
    {MetRcdMem36_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem36SbeCnt_f},
    {MetRcdMem37_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem37SbeCnt_f},
    {MetRcdMem38_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem38SbeCnt_f},
    {MetRcdMem39_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem39SbeCnt_f},
    {MetRcdMem40_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem40SbeCnt_f},
    {MetRcdMem41_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem41SbeCnt_f},
    {MetRcdMem42_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem42SbeCnt_f},
    {MetRcdMem43_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem43SbeCnt_f},
    {MetRcdMem44_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem44SbeCnt_f},
    {MetRcdMem45_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem45SbeCnt_f},
    {MetRcdMem46_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem46SbeCnt_f},
    {MetRcdMem47_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem47SbeCnt_f},
    {MetRcdMem48_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem48SbeCnt_f},
    {MetRcdMem49_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem49SbeCnt_f},
    {MetRcdMem50_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem50SbeCnt_f},
    {MetRcdMem51_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem51SbeCnt_f},
    {MetRcdMem52_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem52SbeCnt_f},
    {MetRcdMem53_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem53SbeCnt_f},
    {MetRcdMem54_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem54SbeCnt_f},
    {MetRcdMem55_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem55SbeCnt_f},
    {MetRcdMem56_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem56SbeCnt_f},
    {MetRcdMem57_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem57SbeCnt_f},
    {MetRcdMem58_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem58SbeCnt_f},
    {MetRcdMem59_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem59SbeCnt_f},
    {MetRcdMem60_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem60SbeCnt_f},
    {MetRcdMem61_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem61SbeCnt_f},
    {MetRcdMem62_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem62SbeCnt_f},
    {MetRcdMem63_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdMem63SbeCnt_f},
    {MetRcdReplicatedCnt0_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt0SbeCnt_f},
    {MetRcdReplicatedCnt1_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt1SbeCnt_f},
    {MetRcdReplicatedCnt2_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt2SbeCnt_f},
    {MetRcdReplicatedCnt3_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt3SbeCnt_f},
    {MetRcdReplicatedCnt4_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt4SbeCnt_f},
    {MetRcdReplicatedCnt5_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt5SbeCnt_f},
    {MetRcdReplicatedCnt6_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt6SbeCnt_f},
    {MetRcdReplicatedCnt7_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt7SbeCnt_f},
    {MetRcdReplicatedCnt8_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt8SbeCnt_f},
    {MetRcdReplicatedCnt9_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt9SbeCnt_f},
    {MetRcdReplicatedCnt10_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt10SbeCnt_f},
    {MetRcdReplicatedCnt11_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt11SbeCnt_f},
    {MetRcdReplicatedCnt12_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt12SbeCnt_f},
    {MetRcdReplicatedCnt13_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt13SbeCnt_f},
    {MetRcdReplicatedCnt14_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt14SbeCnt_f},
    {MetRcdReplicatedCnt15_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt15SbeCnt_f},
    {MetRcdReplicatedCnt16_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt16SbeCnt_f},
    {MetRcdReplicatedCnt17_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt17SbeCnt_f},
    {MetRcdReplicatedCnt18_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt18SbeCnt_f},
    {MetRcdReplicatedCnt19_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt19SbeCnt_f},
    {MetRcdReplicatedCnt20_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt20SbeCnt_f},
    {MetRcdReplicatedCnt21_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt21SbeCnt_f},
    {MetRcdReplicatedCnt22_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt22SbeCnt_f},
    {MetRcdReplicatedCnt23_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt23SbeCnt_f},
    {MetRcdReplicatedCnt24_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt24SbeCnt_f},
    {MetRcdReplicatedCnt25_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt25SbeCnt_f},
    {MetRcdReplicatedCnt26_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt26SbeCnt_f},
    {MetRcdReplicatedCnt27_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt27SbeCnt_f},
    {MetRcdReplicatedCnt28_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt28SbeCnt_f},
    {MetRcdReplicatedCnt29_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt29SbeCnt_f},
    {MetRcdReplicatedCnt30_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt30SbeCnt_f},
    {MetRcdReplicatedCnt31_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt31SbeCnt_f},
    {MetRcdReplicatedCnt32_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt32SbeCnt_f},
    {MetRcdReplicatedCnt33_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt33SbeCnt_f},
    {MetRcdReplicatedCnt34_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt34SbeCnt_f},
    {MetRcdReplicatedCnt35_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt35SbeCnt_f},
    {MetRcdReplicatedCnt36_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt36SbeCnt_f},
    {MetRcdReplicatedCnt37_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt37SbeCnt_f},
    {MetRcdReplicatedCnt38_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt38SbeCnt_f},
    {MetRcdReplicatedCnt39_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt39SbeCnt_f},
    {MetRcdReplicatedCnt40_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt40SbeCnt_f},
    {MetRcdReplicatedCnt41_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt41SbeCnt_f},
    {MetRcdReplicatedCnt42_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt42SbeCnt_f},
    {MetRcdReplicatedCnt43_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt43SbeCnt_f},
    {MetRcdReplicatedCnt44_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt44SbeCnt_f},
    {MetRcdReplicatedCnt45_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt45SbeCnt_f},
    {MetRcdReplicatedCnt46_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt46SbeCnt_f},
    {MetRcdReplicatedCnt47_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt47SbeCnt_f},
    {MetRcdReplicatedCnt48_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt48SbeCnt_f},
    {MetRcdReplicatedCnt49_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt49SbeCnt_f},
    {MetRcdReplicatedCnt50_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt50SbeCnt_f},
    {MetRcdReplicatedCnt51_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt51SbeCnt_f},
    {MetRcdReplicatedCnt52_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt52SbeCnt_f},
    {MetRcdReplicatedCnt53_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt53SbeCnt_f},
    {MetRcdReplicatedCnt54_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt54SbeCnt_f},
    {MetRcdReplicatedCnt55_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt55SbeCnt_f},
    {MetRcdReplicatedCnt56_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt56SbeCnt_f},
    {MetRcdReplicatedCnt57_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt57SbeCnt_f},
    {MetRcdReplicatedCnt58_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt58SbeCnt_f},
    {MetRcdReplicatedCnt59_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt59SbeCnt_f},
    {MetRcdReplicatedCnt60_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt60SbeCnt_f},
    {MetRcdReplicatedCnt61_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt61SbeCnt_f},
    {MetRcdReplicatedCnt62_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt62SbeCnt_f},
    {MetRcdReplicatedCnt63_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metRcdReplicatedCnt63SbeCnt_f},
    {MetSlice0ReleaseMsgFifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metSlice0ReleaseMsgFifoSbeCnt_f},
    {MetSlice1ReleaseMsgFifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metSlice1ReleaseMsgFifoSbeCnt_f},
    {MetSlice2ReleaseMsgFifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metSlice2ReleaseMsgFifoSbeCnt_f},
    {MetSlice3ReleaseMsgFifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_metSlice3ReleaseMsgFifoSbeCnt_f},
    {RcdFromBrSlice0Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice0FifoSbeCnt_f},
    {RcdFromBrSlice1Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice1FifoSbeCnt_f},
    {RcdFromBrSlice2Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice2FifoSbeCnt_f},
    {RcdFromBrSlice3Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice3FifoSbeCnt_f},
    {RcdFromBrSlice4Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice4FifoSbeCnt_f},
    {RcdFromBrSlice5Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice5FifoSbeCnt_f},
    {RcdFromBrSlice6Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice6FifoSbeCnt_f},
    {RcdFromBrSlice7Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromBrSlice7FifoSbeCnt_f},
    {RcdFromEnqSlice0Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromEnqSlice0FifoSbeCnt_f},
    {RcdFromEnqSlice1Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromEnqSlice1FifoSbeCnt_f},
    {RcdFromEnqSlice2Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromEnqSlice2FifoSbeCnt_f},
    {RcdFromEnqSlice3Fifo_t, MetFifoRcdParityStatus_t, MetFifoRcdParityStatus_rcdFromEnqSlice3FifoSbeCnt_f},
    {DsDestMapProfileMc_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsDestMapProfileMcSbeCnt_f},
    {MaxTblId_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMet0SbeCnt_f},
    {MaxTblId_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMet1SbeCnt_f},
    {MaxTblId_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMet2SbeCnt_f},
    {MaxTblId_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMet3SbeCnt_f},
    {DsMetApsBridge_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetApsBridgeSbeCnt_f},
    {DsMetApsProtectionEn_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetApsProtectionEnSbeCnt_f},
    {DsMetLinkAggregatePort_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetLinkAggregatePortSbeCnt_f},
    {DsMetNonUcCflexMemberBitmap_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetNonUcCflexMemberBitmapSbeCnt_f},
    {DsMetNonUcChanLagBlockMask_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetNonUcChanLagBlockMaskSbeCnt_f},
    {DsMetNonUcLagBlockMask_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetNonUcLagBlockMaskSbeCnt_f},
    {DsMetNonUcLagMemberBitmap_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetNonUcLagMemberBitmapSbeCnt_f},
    {DsMetPortChannelLag_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetPortChannelLagSbeCnt_f},
    {DsMetPortLagLinkSelfHealingSet_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_dsMetPortLagLinkSelfHealingSetSbeCnt_f},
    {MetDsMetResTrackFifo_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_metDsMetResTrackFifoSbeCnt_f},
    {MetMcastInfoTrackFifo_t, MetFifoShareParityStatus_t, MetFifoShareParityStatus_metMcastInfoTrackFifoSbeCnt_f},
    {DsMplsHashCamAd_t, MplsHashParityStatus_t, MplsHashParityStatus_dsMplsHashCamAdSbeCnt_f},
    {DsChannelizeMode_t, NetRxParityStatus_t, NetRxParityStatus_dsChannelizeModeSbeCnt_f},
    {NetRxCalendar0_t, NetRxParityStatus_t, NetRxParityStatus_netRxCalendar0SbeCnt_f},
    {NetRxCalendar1_t, NetRxParityStatus_t, NetRxParityStatus_netRxCalendar1SbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxFreePtr0FifoSbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxFreePtr1FifoSbeCnt_f},
    {NetRxLoopDataFifo_t, NetRxParityStatus_t, NetRxParityStatus_netRxLoopDataFifoSbeCnt_f},
    {NetRxMiscDataFifo_t, NetRxParityStatus_t, NetRxParityStatus_netRxMiscDataFifoSbeCnt_f},
    {NetRxMiscInfoFifo_t, NetRxParityStatus_t, NetRxParityStatus_netRxMiscInfoFifoSbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxPktBuf0P0SbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxPktBuf0P1SbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxPktBuf1P0SbeCnt_f},
    {MaxTblId_t, NetRxParityStatus_t, NetRxParityStatus_netRxPktBuf1P1SbeCnt_f},
    {NetRxVoqLinkList0_t, NetRxParityStatus_t, NetRxParityStatus_netRxVoqLinkList0SbeCnt_f},
    {NetRxVoqLinkList1_t, NetRxParityStatus_t, NetRxParityStatus_netRxVoqLinkList1SbeCnt_f},
    {MaxTblId_t, NetTxParityStatus_t, NetTxParityStatus_netTxFreePtrFifo0SbeCnt_f},
    {MaxTblId_t, NetTxParityStatus_t, NetTxParityStatus_netTxFreePtrFifo1SbeCnt_f},
    {NetTxPktHdr0_t, NetTxParityStatus_t, NetTxParityStatus_netTxPktHdr0SbeCnt_f},
    {NetTxPktHdr1_t, NetTxParityStatus_t, NetTxParityStatus_netTxPktHdr1SbeCnt_f},
    {DsOamExcp_t, OamFwdParityStatus_t, OamFwdParityStatus_dsOamExcpSbeCnt_f},
    {DsOamHashKeyTable0_t, OamHashParityStatus_t, OamHashParityStatus_dsOamHashKeyTable0SbeCnt_f},
    {DsOamHashKeyTable1_t, OamHashParityStatus_t, OamHashParityStatus_dsOamHashKeyTable1SbeCnt_f},
    {OamHashLkupMgrInputFifo_t, OamHashParityStatus_t, OamHashParityStatus_oamHashLkupMgrInputFifoSbeCnt_f},
    {OamParserAsyncPDFifo_t, OamParserParityStatus_t, OamParserParityStatus_oamParserAsyncPDFifoSbeCnt_f},
    {OamParserPDFifo_t, OamParserParityStatus_t, OamParserParityStatus_oamParserPDFifoSbeCnt_f},
    {DsBfdV6Addr_t, OamProcParityStatus_t, OamProcParityStatus_dsBfdV6AddrSbeCnt_f},
    {DsMaName_t, OamProcParityStatus_t, OamProcParityStatus_dsMaNameSbeCnt_f},
    {DsMa_t, OamProcParityStatus_t, OamProcParityStatus_dsMaSbeCnt_f},
    {DsMp_t, OamProcParityStatus_t, OamProcParityStatus_dsMpSbeCnt_f},
    {DsOamTwampTxCfg_t, OamProcParityStatus_t, OamProcParityStatus_dsOamTwampTxCfgSbeCnt_f},
    {DsPortProperty_t, OamProcParityStatus_t, OamProcParityStatus_dsPortPropertySbeCnt_f},
    {DsRmepHashKeyTable0_t, OamProcParityStatus_t, OamProcParityStatus_dsRmepHashKeyTable0SbeCnt_f},
    {DsRmepHashKeyTable1_t, OamProcParityStatus_t, OamProcParityStatus_dsRmepHashKeyTable1SbeCnt_f},
    {MaxTblId_t, PciePhyMemStats_t, PciePhyMemStats_pciePhyMemCmnSbeCnt_f},
    {MaxTblId_t, PciePhyMemStats_t, PciePhyMemStats_pciePhyMemLane0SbeCnt_f},
    {MaxTblId_t, PciePhyMemStats_t, PciePhyMemStats_pciePhyMemLane1SbeCnt_f},
    {MaxTblId_t, PciePhyMemStats_t, PciePhyMemStats_pciePhyMemLane2SbeCnt_f},
    {MaxTblId_t, PciePhyMemStats_t, PciePhyMemStats_pciePhyMemLane3SbeCnt_f},
    {DsAging_t, PpAgingParityStatus_t, PpAgingParityStatus_dsAgingIntSbeCnt_f},
    {DsAgingStatusFib_t, PpAgingParityStatus_t, PpAgingParityStatus_dsAgingStatusFibIntSbeCnt_f},
    {DsAgingStatusTcam_t, PpAgingParityStatus_t, PpAgingParityStatus_dsAgingStatusTcamSbeCnt_f},
    {DsEgrProgramKeyGenProfile0_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile0SbeCnt_f},
    {DsEgrProgramKeyGenProfile1_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile1SbeCnt_f},
    {DsEgrProgramKeyGenProfile2_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile2SbeCnt_f},
    {DsEgrProgramKeyGenProfile3_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile3SbeCnt_f},
    {DsEgrProgramKeyGenProfile4_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile4SbeCnt_f},
    {DsEgrProgramKeyGenProfile5_t, ProgramEgrAclLtidTcamPartAParityStatus_t, ProgramEgrAclLtidTcamPartAParityStatus_dsEgrProgramKeyGenProfile5SbeCnt_f},
    {DsEgrProgramKeyGenProfile6_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile6SbeCnt_f},
    {DsEgrProgramKeyGenProfile7_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile7SbeCnt_f},
    {DsEgrProgramKeyGenProfile8_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile8SbeCnt_f},
    {DsEgrProgramKeyGenProfile9_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile9SbeCnt_f},
    {DsEgrProgramKeyGenProfile10_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile10SbeCnt_f},
    {DsEgrProgramKeyGenProfile11_t, ProgramEgrAclLtidTcamPartBParityStatus_t, ProgramEgrAclLtidTcamPartBParityStatus_dsEgrProgramKeyGenProfile11SbeCnt_f},
    {DsProgramKeyGenProfile0_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile0SbeCnt_f},
    {DsProgramKeyGenProfile1_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile1SbeCnt_f},
    {DsProgramKeyGenProfile2_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile2SbeCnt_f},
    {DsProgramKeyGenProfile3_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile3SbeCnt_f},
    {DsProgramKeyGenProfile4_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile4SbeCnt_f},
    {DsProgramKeyGenProfile5_t, ProgramIngAclLtidTcamPartAParityStatus_t, ProgramIngAclLtidTcamPartAParityStatus_dsProgramKeyGenProfile5SbeCnt_f},
    {DsProgramKeyGenProfile6_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile6SbeCnt_f},
    {DsProgramKeyGenProfile7_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile7SbeCnt_f},
    {DsProgramKeyGenProfile8_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile8SbeCnt_f},
    {DsProgramKeyGenProfile9_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile9SbeCnt_f},
    {DsProgramKeyGenProfile10_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile10SbeCnt_f},
    {DsProgramKeyGenProfile11_t, ProgramIngAclLtidTcamPartBParityStatus_t, ProgramIngAclLtidTcamPartBParityStatus_dsProgramKeyGenProfile11SbeCnt_f},
    {DsProgramKeyGenProfile12_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile12SbeCnt_f},
    {DsProgramKeyGenProfile13_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile13SbeCnt_f},
    {DsProgramKeyGenProfile14_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile14SbeCnt_f},
    {DsProgramKeyGenProfile15_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile15SbeCnt_f},
    {DsProgramKeyGenProfile16_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile16SbeCnt_f},
    {DsProgramKeyGenProfile17_t, ProgramIngAclLtidTcamPartCParityStatus_t, ProgramIngAclLtidTcamPartCParityStatus_dsProgramKeyGenProfile17SbeCnt_f},
    {DsProgramKeyGenProfile18_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile18SbeCnt_f},
    {DsProgramKeyGenProfile19_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile19SbeCnt_f},
    {DsProgramKeyGenProfile20_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile20SbeCnt_f},
    {DsProgramKeyGenProfile21_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile21SbeCnt_f},
    {DsProgramKeyGenProfile22_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile22SbeCnt_f},
    {DsProgramKeyGenProfile23_t, ProgramIngAclLtidTcamPartDParityStatus_t, ProgramIngAclLtidTcamPartDParityStatus_dsProgramKeyGenProfile23SbeCnt_f},
    {DsQMgrQueIdMap_t, QMgrDeqChanParityStatus_t, QMgrDeqChanParityStatus_dsQMgrQueIdMapSbeCnt_f},
    {QMgrQReadResult0Fifo_t, QMgrDeqChanParityStatus_t, QMgrDeqChanParityStatus_qMgrQReadResult0FifoSbeCnt_f},
    {QMgrQReadResult1Fifo_t, QMgrDeqChanParityStatus_t, QMgrDeqChanParityStatus_qMgrQReadResult1FifoSbeCnt_f},
    {QMgrQReadTrack0Fifo_t, QMgrDeqChanParityStatus_t, QMgrDeqChanParityStatus_qMgrQReadTrack0FifoSbeCnt_f},
    {QMgrQReadTrack1Fifo_t, QMgrDeqChanParityStatus_t, QMgrDeqChanParityStatus_qMgrQReadTrack1FifoSbeCnt_f},
    {QMgrDeqEnqReqMcFifo_t, QMgrDeqGrpMcParityStatus_t, QMgrDeqGrpMcParityStatus_qMgrDeqEnqReqMcFifoSbeCnt_f},
    {MaxTblId_t, QMgrDeqGrpMcParityStatus_t, QMgrDeqGrpMcParityStatus_qMgrDeqGrpSchReqMcFifoSbeCnt_f},
    {QMgrDeqEnqReqUcFifo_t, QMgrDeqGrpUcParityStatus_t, QMgrDeqGrpUcParityStatus_qMgrDeqEnqReqUcFifoSbeCnt_f},
    {MaxTblId_t, QMgrDeqGrpUcParityStatus_t, QMgrDeqGrpUcParityStatus_qMgrDeqGrpSchReqUcFifoSbeCnt_f},
    {DsQMgrCosWfqWeight_t, QMgrDeqL4CosParityStatus_t, QMgrDeqL4CosParityStatus_dsQMgrCosWfqWeightSbeCnt_f},
    {QMgrSchEnqReqFifo_t, QMgrDeqL4CosParityStatus_t, QMgrDeqL4CosParityStatus_qMgrSchEnqReqFifoSbeCnt_f},
    {QMgrSchGrpSchReqFifo_t, QMgrDeqL4CosParityStatus_t, QMgrDeqL4CosParityStatus_qMgrSchGrpSchReqFifoSbeCnt_f},
    {DsQMgrCreditUnit_t, QMgrDeqL4GrpParityStatus_t, QMgrDeqL4GrpParityStatus_dsQMgrCreditUnitSbeCnt_f},
    {DsQMgrGrpWfqWeight_t, QMgrDeqL4GrpParityStatus_t, QMgrDeqL4GrpParityStatus_dsQMgrGrpWfqWeightSbeCnt_f},
    {DsQMgrL0QMsg_t, QMgrDeqL0ParityStatus_t, QMgrDeqL0ParityStatus_dsQMgrL0QMsgSbeCnt_f},
    {DsQMgrQueWfqWeight_t, QMgrDeqL4QueParityStatus_t, QMgrDeqL4QueParityStatus_dsQMgrQueWfqWeightSbeCnt_f},
    {DsQMgrChanGrpQMsg_t, QMgrDeqShpParityStatus_t, QMgrDeqShpParityStatus_dsQMgrChanGrpQMsgSbeCnt_f},
    {DsQMgrQueIdMap0_t, QMgrDeqShpParityStatus_t, QMgrDeqShpParityStatus_dsQMgrQueIdMap0SbeCnt_f},
    {QMgrSchCalendar0_t, QMgrDeqShpParityStatus_t, QMgrDeqShpParityStatus_qMgrSchCalendar0SbeCnt_f},
    {QMgrSchCalendar1_t, QMgrDeqShpParityStatus_t, QMgrDeqShpParityStatus_qMgrSchCalendar1SbeCnt_f},
    {DsErmDmaGuaranteedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmDmaGuaranteedThrdProfileMcSbeCnt_f},
    {DsErmDmaLimitedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmDmaLimitedThrdProfileMcSbeCnt_f},
    {DsErmPortGuaranteedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmPortGuaranteedThrdProfileMcSbeCnt_f},
    {DsErmPortLimitedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmPortLimitedThrdProfileMcSbeCnt_f},
    {DsErmPortScGuaranteedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmPortScGuaranteedThrdProfileMcSbeCnt_f},
    {DsErmPortScLimitedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmPortScLimitedThrdProfileMcSbeCnt_f},
    {DsErmQueueGuaranteedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmQueueGuaranteedThrdProfileMcSbeCnt_f},
    {DsErmQueueLimitedThrdProfileMc_t, QMgrErmParityStatus_t, QMgrErmParityStatus_dsErmQueueLimitedThrdProfileMcSbeCnt_f},
    {QMsgLinkTailPreMc0_t, QMgrLinkListMcParityStatus_t, QMgrLinkListMcParityStatus_qMsgLinkTailPreMc0SbeCnt_f},
    {QMsgLinkTailPreMc1_t, QMgrLinkListMcParityStatus_t, QMgrLinkListMcParityStatus_qMsgLinkTailPreMc1SbeCnt_f},
    {QMsgLinkTailPreMc2_t, QMgrLinkListMcParityStatus_t, QMgrLinkListMcParityStatus_qMsgLinkTailPreMc2SbeCnt_f},
    {QMsgLinkTailPreMc3_t, QMgrLinkListMcParityStatus_t, QMgrLinkListMcParityStatus_qMsgLinkTailPreMc3SbeCnt_f},
    {QMsgLinkTailPreUc0_t, QMgrLinkListUcParityStatus_t, QMgrLinkListUcParityStatus_qMsgLinkTailPreUc0SbeCnt_f},
    {QMsgLinkTailPreUc1_t, QMgrLinkListUcParityStatus_t, QMgrLinkListUcParityStatus_qMsgLinkTailPreUc1SbeCnt_f},
    {QMsgLinkTailPreUc2_t, QMgrLinkListUcParityStatus_t, QMgrLinkListUcParityStatus_qMsgLinkTailPreUc2SbeCnt_f},
    {QMsgLinkTailPreUc3_t, QMgrLinkListUcParityStatus_t, QMgrLinkListUcParityStatus_qMsgLinkTailPreUc3SbeCnt_f},
    {DsMcQWriteCFlexDstChannelBlockMask_t, QMgrQWriteParityStatus_t, QMgrQWriteParityStatus_dsMcQWriteCFlexDstChannelBlockMaskSbeCnt_f},
    {DsMcQWritePortBlockMask_t, QMgrQWriteParityStatus_t, QMgrQWriteParityStatus_dsMcQWritePortBlockMaskSbeCnt_f},
    {DsMcQueueMap_t, QMgrQWriteParityStatus_t, QMgrQWriteParityStatus_dsMcQueueMapSbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo0SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo1SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo2SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo3SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo4SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo5SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo6SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo7SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo8SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo9SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo10SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo11SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo12SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo13SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo14SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo15SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo16SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo17SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo18SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo19SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo20SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo21SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo22SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo23SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo24SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo25SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo26SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo27SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo28SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo29SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo30SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo31SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo32SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo33SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo34SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo35SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo36SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo37SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo38SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo39SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo40SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo41SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo42SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo43SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo44SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo45SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo46SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo47SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo48SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo49SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo50SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo51SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo52SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo53SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo54SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo55SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo56SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo57SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo58SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo59SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo60SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo61SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo62SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryMcParityStatus_t, QMgrQueEntryMcParityStatus_qMgrFreePtrMcFifo63SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc0SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc1SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc2SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc3SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc4SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc5SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc6SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc7SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc8SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc9SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc10SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc11SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc12SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc13SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc14SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc15SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc16SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc17SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc18SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc19SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc20SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc21SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc22SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc23SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc24SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc25SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc26SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc27SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc28SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc29SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc30SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc31SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc32SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc33SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc34SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc35SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc36SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc37SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc38SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc39SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc40SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc41SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc42SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc43SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc44SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc45SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc46SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc47SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc48SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc49SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc50SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc51SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc52SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc53SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc54SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc55SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc56SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc57SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc58SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc59SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc60SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc61SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc62SbeCnt_f},
    {MaxTblId_t, QMgrQueEntryUcParityStatus_t, QMgrQueEntryUcParityStatus_qMgrQueEntryUc63SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem0SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem1SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem2SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem3SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem4SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem5SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem6SbeCnt_f},
    {MaxTblId_t, SysMemDebugStats_t, SysMemDebugStats_sysMem7SbeCnt_f},
    {DsXfcState_t, UnknownParityStatus_t, UnknownParityStatus_dsXfcStateSbeCnt_f},
    {RtlDsXfcChannelPortMap_t, UnknownParityStatus_t, UnknownParityStatus_rtlDsXfcChannelPortMapSbeCnt_f},
    {RtlDsXfcState0_t, UnknownParityStatus_t, UnknownParityStatus_rtlDsXfcState0SbeCnt_f},
    {RtlDsXfcState1_t, UnknownParityStatus_t, UnknownParityStatus_rtlDsXfcState1SbeCnt_f},
    {RtlDsXfcState2_t, UnknownParityStatus_t, UnknownParityStatus_rtlDsXfcState2SbeCnt_f},
    {DsPhyPortExt2_t, UserIdHashParityStatus_t, UserIdHashParityStatus_dsPhyPortExt2SbeCnt_f},
    {DsUserIdHash0TcamAdMem_t, UserIdHashParityStatus_t, UserIdHashParityStatus_dsUserIdHash0TcamAdMemSbeCnt_f},
    {DsUserIdHash1TcamAdMem_t, UserIdHashParityStatus_t, UserIdHashParityStatus_dsUserIdHash1TcamAdMemSbeCnt_f},
    {DsUserIdTcam0AdMem_t, UserIdHashParityStatus_t, UserIdHashParityStatus_dsUserIdTcam0AdMemSbeCnt_f},
    {DsUserIdTcam1AdMem_t, UserIdHashParityStatus_t, UserIdHashParityStatus_dsUserIdTcam1AdMemSbeCnt_f},
    {DsXSecDecryptSa_t, XSecDecParityStatus_t, XSecDecParityStatus_dsXSecDecryptSaSbeCnt_f},
    {DsXSecDecryptSaStatus_t, XSecDecParityStatus_t, XSecDecParityStatus_dsXSecDecryptSaStatusSbeCnt_f},
    {DsXSecDecryptSc_t, XSecDecParityStatus_t, XSecDecParityStatus_dsXSecDecryptScSbeCnt_f},
    {DsXSecDecryptSecY_t, XSecDecParityStatus_t, XSecDecParityStatus_dsXSecDecryptSecYSbeCnt_f},
    {XSecDecChanInfo_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecDecChanInfoSbeCnt_f},
    {MaxTblId_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecDecIcvInfoSbeCnt_f},
    {XSecRxHashKeyTable0_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecRxHashKeyTable0SbeCnt_f},
    {XSecRxHashKeyTable1_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecRxHashKeyTable1SbeCnt_f},
    {XSecRxHashKeyTable2_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecRxHashKeyTable2SbeCnt_f},
    {XSecRxHashKeyTable3_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecRxHashKeyTable3SbeCnt_f},
    {XSecRxLookupAd_t, XSecDecParityStatus_t, XSecDecParityStatus_xSecRxLookupAdSbeCnt_f},
    {DsXSecEncryptSa_t, XSecEncParityStatus_t, XSecEncParityStatus_dsXSecEncryptSaSbeCnt_f},
    {DsXSecEncryptSaStatus_t, XSecEncParityStatus_t, XSecEncParityStatus_dsXSecEncryptSaStatusSbeCnt_f},
    {DsXSecEncryptSc_t, XSecEncParityStatus_t, XSecEncParityStatus_dsXSecEncryptScSbeCnt_f},
    {DsXSecEncryptSecY_t, XSecEncParityStatus_t, XSecEncParityStatus_dsXSecEncryptSecYSbeCnt_f},
    {MaxTblId_t, XSecEncParityStatus_t, XSecEncParityStatus_hashResultVoqCellSbeCnt_f},
    {XSecEncChanInfo_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecEncChanInfoSbeCnt_f},
    {MaxTblId_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecEncIcvInfoSbeCnt_f},
    {XSecTxHashKeyTable0_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecTxHashKeyTable0SbeCnt_f},
    {XSecTxHashKeyTable1_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecTxHashKeyTable1SbeCnt_f},
    {XSecTxHashKeyTable2_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecTxHashKeyTable2SbeCnt_f},
    {XSecTxHashKeyTable3_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecTxHashKeyTable3SbeCnt_f},
    {XSecTxLookupAd_t, XSecEncParityStatus_t, XSecEncParityStatus_xSecTxLookupAdSbeCnt_f},
    {MaxTblId_t, MaxTblId_t, 0}
};


uint16 drv_ecc_at_scan_tcam_tbl[][5] =
{
    {DRV_FTM_TCAM_KEY0,DsAclQosMacKey160Egr0_t,DsAclQosMacKey160Egr1_t,DsAclQosMacKey160Egr2_t,MaxTblId_t},
    {DRV_FTM_TCAM_KEY0,DsAclQosMacKey160Ing0_t,DsAclQosMacKey160Ing1_t,DsAclQosMacKey160Ing2_t,DsAclQosMacKey160Ing3_t},
    {DRV_FTM_TCAM_KEY0,DsAclQosMacKey160Ing4_t,DsAclQosMacKey160Ing5_t,DsAclQosMacKey160Ing6_t,DsAclQosMacKey160Ing7_t},
    {DRV_FTM_TCAM_KEY0,DsUserId0TcamKey160_t,DsUserId1TcamKey160_t,MaxTblId_t,MaxTblId_t},
    {DRV_FTM_LPM_TCAM_KEY0,DsLpmTcamIpv4HalfKey_t,MaxTblId_t ,MaxTblId_t,MaxTblId_t},
    {DRV_FTM_CID_TCAM,DsCategoryIdPairTcamKey_t,MaxTblId_t,MaxTblId_t,MaxTblId_t},
    {MaxTblId_t,MaxTblId_t,MaxTblId_t,MaxTblId_t,MaxTblId_t}
};

#define DRV_MEM_REG(name,  TYPE, SUB_TYPE, SUB_ID, id,  num, addr3w, addr6w, addr12w, E_SZ) \
    do{\
        drv_at_mem[id].entry_num = num;\
        drv_at_mem[id].addr_3w = addr3w;\
        drv_at_mem[id].addr_6w = addr6w;\
        drv_at_mem[id].addr_12w = addr12w;\
        drv_at_mem[id].type = TYPE;\
        drv_at_mem[id].sub_type = SUB_TYPE;\
        drv_at_mem[id].sub_id = SUB_ID;\
        drv_at_mem[id].entry_size = E_SZ<<2;\
     }while(0);\

#define DRV_MEM_REG_TCAM(name,  TYPE, SUB_TYPE, SUB_ID, id,  num, addr3w, addr6w, addr12w, TMID) \
    do{\
        drv_at_mem[id].entry_num = num;\
        drv_at_mem[id].addr_3w = addr3w;\
        drv_at_mem[id].addr_6w = addr6w;\
        drv_at_mem[id].addr_12w = addr12w;\
        drv_at_mem[id].type = TYPE;\
        drv_at_mem[id].sub_type = SUB_TYPE;\
        drv_at_mem[id].sub_id = SUB_ID;\
        drv_at_mem[id].tcam_map_id = TMID;\
     }while(0)

#define DynamicFibKeyShareRam12WAddrBase        TABLE_INFO(lchip, DynamicKeyShareRam12W_t).addrs[0]
#define DynamicFibKeyShareRam16WAddrBase        TABLE_INFO(lchip, DynamicKeyShareRam16W_t).addrs[0]
#define DynamicFibKeyAntFlowAddrBase        TABLE_INFO(lchip, DynamicKeyAntFlow_t).addrs[0]
#define DynamicMiscKeyShareRamAddrBase      TABLE_INFO(lchip, DynamicMiscShareRam12W_t).addrs[0]
#define DynamicMiscKeyMplsHashAddrBase      TABLE_INFO(lchip, DynamicMiscMplsHash16W_t).addrs[0]
#define DynamicAdShareRamAddrBase           TABLE_INFO(lchip, DynamicAdShareRam16W_t).addrs[0]
#define DynamicEditShareRamAddrBase         TABLE_INFO(lchip, DynamicEditShareRam16W_t).addrs[0]

#if 0
#define QueueHashRamAddrBase                TABLE_INFO(lchip, DsQueueMapHashKeyTable_t).addrs[0]
#endif
#define DynamicFibKeyShareRam12WBlockBase(B)    (DynamicFibKeyShareRam12WAddrBase   + (B<<21))
#define DynamicFibKeyShareRam16WBlockBase(B)    (DynamicFibKeyShareRam16WAddrBase   + (B<<21))
#define DynamicFibKeyAntFlowBlockBase(B)    (DynamicFibKeyAntFlowAddrBase   + (B<<20))
#define DynamicMiscKeyShareRamBlockBase(B)  (DynamicMiscKeyShareRamAddrBase + (B<<18))
#define DynamicMiscKeyMplsHashBlockBase(B)  (DynamicMiscKeyMplsHashAddrBase + (B<<18))
#define DynamicAdShareRamBlockBase(B)       (DynamicAdShareRamAddrBase      + (B<<21))
#define DynamicAdGemPortBlockBase(B)        (DynamicAdGemPortAddrBase       + (B<<19))
#define DynamicEditShareRamBlockBase(B)     (DynamicEditShareRamAddrBase    + (B<<21))
#if 0
#define QueueHashRamBlockBase(B)            (QueueHashRamAddrBase           + (B<<15))
#endif
#define _________FLOW_TCAM_MEM_ADDR_________

#define IgrSclTcam0KeyBlockBase(B)          (TABLE_INFO(lchip, UserIdHashTcamMem_t).addrs[0] + (B<<9)*TABLE_ENTRY_OFFSET(lchip, UserIdHashTcamMem_t))
#define IgrSclTcam1KeyBlockBase(B)          (TABLE_INFO(lchip, UserIdTcamMem_t).addrs[0] + (B<<10)*TABLE_ENTRY_OFFSET(lchip, UserIdTcamMem_t))
#define IgrAclTcamKeyBlockBase(B)           (TABLE_INFO(lchip, ProgramIngAclTcamMem_t).addrs[0] + (B<<9)*TABLE_ENTRY_OFFSET(lchip, ProgramIngAclTcamMem_t))
#define EgrAclTcamKeyBlockBase(B)           (TABLE_INFO(lchip, ProgramEgrAclTcamMem_t).addrs[0] + (B<<8)*TABLE_ENTRY_OFFSET(lchip, ProgramEgrAclTcamMem_t))
#define EgrSclTcamKeyBlockBase(B)           (TABLE_INFO(lchip, EgrSclHashTcamMem_t).addrs[0] + (B<<8)*TABLE_ENTRY_OFFSET(lchip, EgrSclHashTcamMem_t))
#define LpmTcam0KeyBlockBase(B)             (TABLE_INFO(lchip, LpmTcamTcamMem_t).addrs[0] + (B<<12)*TABLE_ENTRY_OFFSET(lchip, LpmTcamTcamMem_t))
#define LpmTcam1KeyBlockBase(B)             (LpmTcam0KeyBlockBase(4) + (B<<11)*TABLE_ENTRY_OFFSET(lchip, LpmTcamTcamMem_t))

/* program acl tcam addr is not continuous. */
#define IgrAclTcamAdBlockBase(B)            (TABLE_INFO(lchip, DsAclIngress_t).addrs[0] + (B*512)*DRV_ADDR_BYTES_PER_ENTRY*4)
/* egress acl tcam ad size is 5w. */
#define EgrAclTcamAdBlockBase(B)            (TABLE_INFO(lchip, DsAclEgress_t).addrs[0]  + (B*256)*DRV_ADDR_BYTES_PER_ENTRY*2)
#define _________LPM_TCAM_MEM_ADDR_________

#define DRV_LPM_TCAM_AD0_BASE(B)            (TABLE_INFO(lchip, LpmTcamAdMem_t).addrs[0] + (B<<12)*DRV_LPM_AD0_BYTE_PER_ENTRY)
#define DRV_LPM_TCAM_AD0_BASE_1(B)            (TABLE_INFO(lchip, LpmTcamAdMem_t).addrs[0] + (B<<11)*DRV_LPM_AD0_BYTE_PER_ENTRY)
#define DRV_LPM_TCAM_AD1_BASE(B)            (DRV_LPM_TCAM_AD0_BASE(8) + (B<<13)*DRV_LPM_AD1_BYTE_PER_ENTRY)



static void
_drv_at_mem_cutdown(uint8 lchip)
{
#if (SDK_WORK_PLATFORM == 1)
    uint32 spec_arr[DRV_FTM_MAX_ID] = {0};
    uint8 index = 0;
    extern int32 cm_mem_model_parse_cutdown_file(uint32* spec_arr, uint8 from_drv);
    if (cm_mem_model_parse_cutdown_file(spec_arr, 1) < 0)
    {
        return;
    }
    DRV_MEM_REG("IpfixKey0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX,  0,  DRV_FTM_SRAM43, spec_arr[DRV_FTM_SRAM43],  TABLE_INFO(lchip, DsIpfixHashKeyTable12W0_t).addrs[0],  0, 0,20);
     DRV_MEM_REG("IpfixKey1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX,  0,  DRV_FTM_SRAM44, spec_arr[DRV_FTM_SRAM44],  TABLE_INFO(lchip, DsIpfixHashKeyTable12W1_t).addrs[0],  0, 0,20);
     DRV_MEM_REG("KeySram0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  0,   DRV_FTM_SRAM0,  spec_arr[DRV_FTM_SRAM0],   DynamicFibKeyShareRam12WBlockBase(0), 0, 0, 12);
     DRV_MEM_REG("KeySram1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  1,   DRV_FTM_SRAM1,  spec_arr[DRV_FTM_SRAM1],   DynamicFibKeyShareRam12WBlockBase(1), 0, 0, 12);

    DRV_MEM_REG_TCAM("Tcam key0",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  0,  DRV_FTM_TCAM_KEY0,  spec_arr[DRV_FTM_TCAM_KEY0],    0x00000000, 0, 0, 0);
        DRV_MEM_REG_TCAM("Tcam key1",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  1,  DRV_FTM_TCAM_KEY1,  spec_arr[DRV_FTM_TCAM_KEY1],    0x01000000, 0, 0, 0);
        DRV_MEM_REG_TCAM("Tcam key2",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  0,  DRV_FTM_TCAM_KEY2,  2*spec_arr[DRV_FTM_TCAM_KEY2],  0x02000000, 0, 0, 1);
        DRV_MEM_REG_TCAM("Tcam key3",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  1,  DRV_FTM_TCAM_KEY3,  2*spec_arr[DRV_FTM_TCAM_KEY3],  0x03000000, 0, 0, 1);
        DRV_MEM_REG_TCAM("Tcam key4",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  0,  DRV_FTM_TCAM_KEY4,  2*spec_arr[DRV_FTM_TCAM_KEY4],  0x04000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key5",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  1,  DRV_FTM_TCAM_KEY5,  2*spec_arr[DRV_FTM_TCAM_KEY5],  0x05000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key6",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  2,  DRV_FTM_TCAM_KEY6,  2*spec_arr[DRV_FTM_TCAM_KEY6],  0x06000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key7",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  3,  DRV_FTM_TCAM_KEY7,  2*spec_arr[DRV_FTM_TCAM_KEY7],  0x07000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key8",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  4,  DRV_FTM_TCAM_KEY8,  2*spec_arr[DRV_FTM_TCAM_KEY8],  0x08000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key9",  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  5,  DRV_FTM_TCAM_KEY9,  2*spec_arr[DRV_FTM_TCAM_KEY9],  0x09000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key10", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  6,  DRV_FTM_TCAM_KEY10, 2*spec_arr[DRV_FTM_TCAM_KEY10], 0x0A000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key11", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  7,  DRV_FTM_TCAM_KEY11, 2*spec_arr[DRV_FTM_TCAM_KEY11], 0x0B000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key12", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  8,  DRV_FTM_TCAM_KEY12, 2*spec_arr[DRV_FTM_TCAM_KEY12], 0x0C000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key13", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  9,  DRV_FTM_TCAM_KEY13, 2*spec_arr[DRV_FTM_TCAM_KEY13], 0x0D000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key14", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  10, DRV_FTM_TCAM_KEY14, 2*spec_arr[DRV_FTM_TCAM_KEY14], 0x0E000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key15", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  11, DRV_FTM_TCAM_KEY15, 2*spec_arr[DRV_FTM_TCAM_KEY15], 0x0F000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key16", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  12, DRV_FTM_TCAM_KEY16, 2*spec_arr[DRV_FTM_TCAM_KEY16], 0x10000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key17", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  13, DRV_FTM_TCAM_KEY17, 2*spec_arr[DRV_FTM_TCAM_KEY17], 0x11000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key18", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  14, DRV_FTM_TCAM_KEY18, 2*spec_arr[DRV_FTM_TCAM_KEY18], 0x12000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key19", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  15, DRV_FTM_TCAM_KEY19, 2*spec_arr[DRV_FTM_TCAM_KEY19], 0x13000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key20", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  16, DRV_FTM_TCAM_KEY20, 2*spec_arr[DRV_FTM_TCAM_KEY20], 0x14000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key21", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  17, DRV_FTM_TCAM_KEY21, 2*spec_arr[DRV_FTM_TCAM_KEY21], 0x15000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key22", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  18, DRV_FTM_TCAM_KEY22, 2*spec_arr[DRV_FTM_TCAM_KEY22], 0x16000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key23", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  19, DRV_FTM_TCAM_KEY23, 2*spec_arr[DRV_FTM_TCAM_KEY23], 0x17000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key24", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  20, DRV_FTM_TCAM_KEY24, 2*spec_arr[DRV_FTM_TCAM_KEY24], 0x18000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key25", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  21, DRV_FTM_TCAM_KEY25, 2*spec_arr[DRV_FTM_TCAM_KEY25], 0x19000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key26", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  22, DRV_FTM_TCAM_KEY26, 2*spec_arr[DRV_FTM_TCAM_KEY26], 0x1A000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key27", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  23, DRV_FTM_TCAM_KEY27, 2*spec_arr[DRV_FTM_TCAM_KEY27], 0x1B000000, 0, 0, 2);
        DRV_MEM_REG_TCAM("Tcam key28", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  0,  DRV_FTM_TCAM_KEY28, 2*spec_arr[DRV_FTM_TCAM_KEY28], 0x1C000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key29", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  1,  DRV_FTM_TCAM_KEY29, 2*spec_arr[DRV_FTM_TCAM_KEY29], 0x1D000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key30", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  2,  DRV_FTM_TCAM_KEY30, 2*spec_arr[DRV_FTM_TCAM_KEY30], 0x1E000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key31", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  3,  DRV_FTM_TCAM_KEY31, 2*spec_arr[DRV_FTM_TCAM_KEY31], 0x1F000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key32", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  4,  DRV_FTM_TCAM_KEY32, 2*spec_arr[DRV_FTM_TCAM_KEY32], 0x1C000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key33", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  5,  DRV_FTM_TCAM_KEY33, 2*spec_arr[DRV_FTM_TCAM_KEY33], 0x1D000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key34", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  6,  DRV_FTM_TCAM_KEY34, 2*spec_arr[DRV_FTM_TCAM_KEY34], 0x1E000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key35", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  7,  DRV_FTM_TCAM_KEY35, 2*spec_arr[DRV_FTM_TCAM_KEY35], 0x1F000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key36", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  8,  DRV_FTM_TCAM_KEY36, 2*spec_arr[DRV_FTM_TCAM_KEY36], 0x20000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key37", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  9,  DRV_FTM_TCAM_KEY37, 2*spec_arr[DRV_FTM_TCAM_KEY37], 0x21000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key38", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  10, DRV_FTM_TCAM_KEY38, 2*spec_arr[DRV_FTM_TCAM_KEY38], 0x22000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key39", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_FLOW_KEY,  11, DRV_FTM_TCAM_KEY39, 2*spec_arr[DRV_FTM_TCAM_KEY39], 0x23000000, 0, 0, 3);
        DRV_MEM_REG_TCAM("Tcam key40", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_E_SCL_KEY, 0,  DRV_FTM_TCAM_KEY40, spec_arr[DRV_FTM_TCAM_KEY40],   0x30000000, 0, 0, 4);
        DRV_MEM_REG_TCAM("Tcam key41", DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_E_SCL_KEY, 1,  DRV_FTM_TCAM_KEY41, spec_arr[DRV_FTM_TCAM_KEY41],   0x31000000, 0, 0, 4);   
        DRV_MEM_REG_TCAM("LPM key0" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  0,  DRV_FTM_LPM_TCAM_KEY0, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY0], 0x20000000, 0, 0,5);
        DRV_MEM_REG_TCAM("LPM key1" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  1,  DRV_FTM_LPM_TCAM_KEY1, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY1], 0x21000000, 0, 0,5);
        DRV_MEM_REG_TCAM("LPM key2" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  2,  DRV_FTM_LPM_TCAM_KEY2, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY2], 0x22000000, 0, 0,5);
        DRV_MEM_REG_TCAM("LPM key3" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  3,  DRV_FTM_LPM_TCAM_KEY3, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY3], 0x23000000, 0, 0,5);
        DRV_MEM_REG_TCAM("LPM key4" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  4,  DRV_FTM_LPM_TCAM_KEY4, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY4], 0x24000000, 0, 0,5);
        DRV_MEM_REG_TCAM("LPM key5" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  5,  DRV_FTM_LPM_TCAM_KEY5, 2*spec_arr[DRV_FTM_LPM_TCAM_KEY5], 0x25000000, 0, 0,5);
        TABLE_INFO(lchip, UserIdHashTcamMem_t).entry = (spec_arr[DRV_FTM_TCAM_KEY0] + spec_arr[DRV_FTM_TCAM_KEY1]);
        TABLE_INFO(lchip, UserIdTcamMem_t).entry = (spec_arr[DRV_FTM_TCAM_KEY2] + spec_arr[DRV_FTM_TCAM_KEY3]);
        TABLE_INFO(lchip, ProgramIngAclTcamMem_t).entry = (spec_arr[DRV_FTM_TCAM_KEY4] + spec_arr[DRV_FTM_TCAM_KEY5] + 
                        spec_arr[DRV_FTM_TCAM_KEY6] + spec_arr[DRV_FTM_TCAM_KEY7]+ spec_arr[DRV_FTM_TCAM_KEY8] + 
                        spec_arr[DRV_FTM_TCAM_KEY9] + spec_arr[DRV_FTM_TCAM_KEY10] + spec_arr[DRV_FTM_TCAM_KEY11] + 
                        spec_arr[DRV_FTM_TCAM_KEY12] + spec_arr[DRV_FTM_TCAM_KEY13] + spec_arr[DRV_FTM_TCAM_KEY14] +
                        spec_arr[DRV_FTM_TCAM_KEY15] + spec_arr[DRV_FTM_TCAM_KEY16] + spec_arr[DRV_FTM_TCAM_KEY17] +
                        spec_arr[DRV_FTM_TCAM_KEY18] + spec_arr[DRV_FTM_TCAM_KEY19] + spec_arr[DRV_FTM_TCAM_KEY20] +
                        spec_arr[DRV_FTM_TCAM_KEY21] + spec_arr[DRV_FTM_TCAM_KEY22] + spec_arr[DRV_FTM_TCAM_KEY23] +
                        spec_arr[DRV_FTM_TCAM_KEY24] + spec_arr[DRV_FTM_TCAM_KEY25] + spec_arr[DRV_FTM_TCAM_KEY26] +
                        spec_arr[DRV_FTM_TCAM_KEY27]);
        TABLE_INFO(lchip, ProgramEgrAclTcamMem_t).entry = (spec_arr[DRV_FTM_TCAM_KEY28] + spec_arr[DRV_FTM_TCAM_KEY29] + 
                        spec_arr[DRV_FTM_TCAM_KEY30] + spec_arr[DRV_FTM_TCAM_KEY31] + spec_arr[DRV_FTM_TCAM_KEY32] +
                        spec_arr[DRV_FTM_TCAM_KEY33] + spec_arr[DRV_FTM_TCAM_KEY34] + spec_arr[DRV_FTM_TCAM_KEY35] +
                        spec_arr[DRV_FTM_TCAM_KEY36] + spec_arr[DRV_FTM_TCAM_KEY37] + spec_arr[DRV_FTM_TCAM_KEY38] +
                        spec_arr[DRV_FTM_TCAM_KEY39]) ;
        TABLE_INFO(lchip, EgrSclHashTcamMem_t).entry = (spec_arr[DRV_FTM_TCAM_KEY40] + spec_arr[DRV_FTM_TCAM_KEY41]);
        TABLE_INFO(lchip, LpmTcamTcamMem_t).entry = (spec_arr[DRV_FTM_LPM_TCAM_KEY0] + spec_arr[DRV_FTM_LPM_TCAM_KEY1] +
                        spec_arr[DRV_FTM_LPM_TCAM_KEY2] + spec_arr[DRV_FTM_LPM_TCAM_KEY3] + 
                        spec_arr[DRV_FTM_LPM_TCAM_KEY4] + spec_arr[DRV_FTM_LPM_TCAM_KEY5]) << 1;
    for (index = 0; index < 14; index++)
    {
        if (DRV_IS_BIT_SET(spec_arr[DRV_FTM_TCAM_KEY0], index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[5].blk_shift = index;     /* UserIdHashTcamMem_t */
        }
        if (DRV_IS_BIT_SET(spec_arr[DRV_FTM_TCAM_KEY2], index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[6].blk_shift = index;     /* UserIdTcamMem_t */
        }
        if (DRV_IS_BIT_SET(spec_arr[DRV_FTM_TCAM_KEY4], index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[3].blk_shift = index;     /* ProgramIngAclTcamMem_t */
        }
        if (DRV_IS_BIT_SET(spec_arr[DRV_FTM_TCAM_KEY28], index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[4].blk_shift = index;     /* ProgramEgrAclTcamMem_t */
        }
        if (DRV_IS_BIT_SET(spec_arr[DRV_FTM_TCAM_KEY40], index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[7].blk_shift = index;     /* EgrSclHashTcamMem_t */
        }
        if (DRV_IS_BIT_SET((spec_arr[DRV_FTM_LPM_TCAM_KEY0] << 2), index))
        {
            p_drv_master[lchip]->drv_io_tcam_db[1].blk_shift = index;     /*LpmTcamTcamMem_t LPM*/
            p_drv_master[lchip]->drv_io_tcam_db[2].blk_shift = index;     /*LpmTcamTcamMem_t NAT*/
        }
    }
#endif
}



int32
drv_mem_init_at(uint8 lchip)
{
    /*Memory000*/DRV_MEM_REG("KeySram0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  0,   DRV_FTM_SRAM0,  4*4*1024,   DynamicFibKeyShareRam12WBlockBase(0), 0, 0, 12);
    /*Memory001*/DRV_MEM_REG("KeySram1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  1,   DRV_FTM_SRAM1,  4*4*1024,   DynamicFibKeyShareRam12WBlockBase(1), 0, 0, 12);
    /*Memory100*/DRV_MEM_REG("KeySram2",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  2,   DRV_FTM_SRAM2,  4*8*1024,   DynamicFibKeyShareRam12WBlockBase(2), 0, 0, 12);
    /*Memory101*/DRV_MEM_REG("KeySram3",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  3,   DRV_FTM_SRAM3,  4*8*1024,   DynamicFibKeyShareRam12WBlockBase(3), 0, 0, 12);
    /*Memory102*/DRV_MEM_REG("KeySram4",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  4,   DRV_FTM_SRAM4,  4*16*1024,  DynamicFibKeyShareRam12WBlockBase(4), 0, 0, 12);
    /*Memory103*/DRV_MEM_REG("KeySram5",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  5,   DRV_FTM_SRAM5,  4*16*1024,  DynamicFibKeyShareRam12WBlockBase(5), 0, 0, 12);
    /*Memory104*/DRV_MEM_REG("KeySram6",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  6,   DRV_FTM_SRAM6,  4*16*1024,  DynamicFibKeyShareRam12WBlockBase(6), DynamicFibKeyAntFlowBlockBase(0), 0, 12);
    /*Memory105*/DRV_MEM_REG("KeySram7",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  7,   DRV_FTM_SRAM7,  4*16*1024,  DynamicFibKeyShareRam12WBlockBase(7), DynamicFibKeyAntFlowBlockBase(1), 0, 12);
    /*Memory106*/DRV_MEM_REG("KeySram8",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  8,   DRV_FTM_SRAM8,  4*4*1024,   DynamicFibKeyShareRam16WBlockBase(8), DynamicFibKeyShareRam12WBlockBase(8), 0, 16);
    /*Memory107*/DRV_MEM_REG("KeySram9",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  9,   DRV_FTM_SRAM9,  4*4*1024,   DynamicFibKeyShareRam16WBlockBase(9), DynamicFibKeyShareRam12WBlockBase(9), 0, 16);
    /*Memory200*/DRV_MEM_REG("KeySram10",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  10,  DRV_FTM_SRAM10, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(0), DynamicMiscKeyMplsHashBlockBase(0), 0, 12);
    /*Memory201*/DRV_MEM_REG("KeySram11",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  11,  DRV_FTM_SRAM11, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(1), DynamicMiscKeyMplsHashBlockBase(1), 0, 12);
    /*Memory202*/DRV_MEM_REG("KeySram12",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  12,  DRV_FTM_SRAM12, 4*4*1024,   DynamicMiscKeyShareRamBlockBase(2), 0, 0, 12);
    /*Memory203*/DRV_MEM_REG("KeySram13",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  13,  DRV_FTM_SRAM13, 4*4*1024,   DynamicMiscKeyShareRamBlockBase(3), 0, 0, 12);
    /*Memory204*/DRV_MEM_REG("KeySram14",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  14,  DRV_FTM_SRAM14, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(4), 0, 0, 12);
    /*Memory205*/DRV_MEM_REG("KeySram15",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  15,  DRV_FTM_SRAM15, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(5), 0, 0, 12);
    /*Memory206*/DRV_MEM_REG("KeySram16",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  16,  DRV_FTM_SRAM16, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(6), 0, 0, 12);
    /*Memory207*/DRV_MEM_REG("KeySram17",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  17,  DRV_FTM_SRAM17, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(7), 0, 0, 12);
    /*Memory208*/DRV_MEM_REG("KeySram18",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  18,  DRV_FTM_SRAM18, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(8), 0, 0, 12);
    /*Memory209*/DRV_MEM_REG("KeySram19",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  19,  DRV_FTM_SRAM19, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(9), 0, 0, 12);
    /*Memory210*/DRV_MEM_REG("KeySram20",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_KEY,  20,  DRV_FTM_SRAM20, 4*2*1024,   DynamicMiscKeyShareRamBlockBase(10),0, 0, 12);


    /*Memory300*/DRV_MEM_REG("AdSram1",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    1,  DRV_FTM_SRAM21, 4*16*1024,  DynamicAdShareRamBlockBase(0), 0, 0, 16);
    /*Memory301*/DRV_MEM_REG("AdSram2",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    2,  DRV_FTM_SRAM22, 4*16*1024,  DynamicAdShareRamBlockBase(1), 0, 0, 16);
    /*Memory302*/DRV_MEM_REG("AdSram3",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    3,  DRV_FTM_SRAM23, 4*8*1024,   DynamicAdShareRamBlockBase(2), 0, 0, 16);
    /*Memory303*/DRV_MEM_REG("AdSram4",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    4,  DRV_FTM_SRAM24, 4*4*1024,   DynamicAdShareRamBlockBase(3), 0, 0, 16);
    /*Memory304*/DRV_MEM_REG("AdSram5",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    5,  DRV_FTM_SRAM25, 4*4*1024,   DynamicAdShareRamBlockBase(4), 0, 0, 16);
    /*Memory305*/DRV_MEM_REG("AdSram6",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_AD,    6,  DRV_FTM_SRAM26, 4*4*1024,   DynamicAdShareRamBlockBase(5), 0, 0, 16);

    /*Memory400*/DRV_MEM_REG("EditSram0",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  0,  DRV_FTM_SRAM27, 4*32*1024,  DynamicEditShareRamBlockBase(0), 0, 0, 16);
    /*Memory401*/DRV_MEM_REG("EditSram1",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  1,  DRV_FTM_SRAM28, 4*16*1024,  DynamicEditShareRamBlockBase(1), 0, 0, 16);
    /*Memory402*/DRV_MEM_REG("EditSram2",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  2,  DRV_FTM_SRAM29, 4*8*1024,   DynamicEditShareRamBlockBase(2), 0, 0, 16);
    /*Memory403*/DRV_MEM_REG("EditSram3",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  3,  DRV_FTM_SRAM30, 4*8*1024,   DynamicEditShareRamBlockBase(3), 0, 0, 16);
    /*Memory404*/DRV_MEM_REG("EditSram4",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  4,  DRV_FTM_SRAM31, 4*4*1024,   DynamicEditShareRamBlockBase(4), 0, 0, 16);
    /*Memory405*/DRV_MEM_REG("EditSram5",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  5,  DRV_FTM_SRAM32, 4*4*1024,   DynamicEditShareRamBlockBase(5), 0, 0, 16);
    /*Memory406*/DRV_MEM_REG("EditSram6",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  6,  DRV_FTM_SRAM33, 4*4*1024,   DynamicEditShareRamBlockBase(6), 0, 0, 16);
    /*Memory407*/DRV_MEM_REG("EditSram7",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  7,  DRV_FTM_SRAM34, 4*4*1024,   DynamicEditShareRamBlockBase(7), 0, 0, 16);
    /*Memory410*/DRV_MEM_REG("EditSram8",  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_EDIT,  8,  DRV_FTM_SRAM35, 4*11*1024,  TABLE_INFO(lchip, DsMet_t).addrs[0], 0, 0, 20);

    DRV_MEM_REG("OamSram0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   0,  DRV_FTM_SRAM36, 4*256,      TABLE_INFO(lchip, DsRmepHashKeyTable0_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("OamSram1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   1,  DRV_FTM_SRAM37, 4*256,      TABLE_INFO(lchip, DsRmepHashKeyTable1_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("OamSram2",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   2,  DRV_FTM_SRAM38, 8*2*1024,   TABLE_INFO(lchip, DsMp_t).addrs[0],                0, 0, 6);
    DRV_MEM_REG("OamSram3",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   3,  DRV_FTM_SRAM39, 4*1*1024,   TABLE_INFO(lchip, DsMa_t).addrs[0],                0, 0, 3);
    DRV_MEM_REG("OamSram4",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   4,  DRV_FTM_SRAM40, 4*1*1024,   TABLE_INFO(lchip, DsMaName_t).addrs[0],            0, 0, 4);
    DRV_MEM_REG("OamSram5",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   5,  DRV_FTM_SRAM41, 4*1*1024,   TABLE_INFO(lchip, DsOamHashKeyTable0_t).addrs[0],  0, 0, 12);
    DRV_MEM_REG("OamSram6",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_OAM,   6,  DRV_FTM_SRAM42, 4*1*1024,   TABLE_INFO(lchip, DsOamHashKeyTable1_t).addrs[0],  0, 0, 12);
#ifdef EMULATION_ENV
    DRV_MEM_REG("IpfixKey",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 0,  DRV_FTM_SRAM43, 32*1024,   TABLE_INFO(lchip, DsIpfixHashKeyTable12W_t).addrs[0],  0, 0, 20);
    DRV_MEM_REG("IpfixKey",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 0,  DRV_FTM_SRAM44, 32*1024,   TABLE_INFO(lchip, DsIpfixHashKeyTable12W_t).addrs[1],  0, 0, 20);
    DRV_MEM_REG("IpfixAd0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 1,  DRV_FTM_SRAM45, 32768,      TABLE_INFO(lchip, DsIpfixSessionRecordMem_t).addrs[0], 0, 0, 9);
    DRV_MEM_REG("IpfixAd1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 2,  DRV_FTM_SRAM46, 32768,      TABLE_INFO(lchip, DsIpfixSessionRecordMem_t).addrs[1], 0, 0, 9);
#else
    DRV_MEM_REG("IpfixKey",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 0,  DRV_FTM_SRAM43, 32*1024,    TABLE_INFO(lchip, DsIpfixHashKeyTable12W0_t).addrs[0],  0, 0, 20);/* AT_TODO */
    DRV_MEM_REG("IpfixKey",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 0,  DRV_FTM_SRAM44, 32*1024,    TABLE_INFO(lchip, DsIpfixHashKeyTable12W1_t).addrs[0],  0, 0, 20);/* AT_TODO */
    DRV_MEM_REG("IpfixAd0",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 1,  DRV_FTM_SRAM45, 32768,      TABLE_INFO(lchip, DsIpfixSessionRecordMem0_t).addrs[0], 0, 0, 9);/* AT_TODO */
    DRV_MEM_REG("IpfixAd1",   DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_IPFIX, 2,  DRV_FTM_SRAM46, 32768,      TABLE_INFO(lchip, DsIpfixSessionRecordMem1_t).addrs[0], 0, 0, 9);/* AT_TODO */
#endif

    DRV_MEM_REG("XsecRx0",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_RX,0, DRV_FTM_SRAM47, 2*64,       TABLE_INFO(lchip, XSecRxHashKeyTable0_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecRx1",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_RX,1, DRV_FTM_SRAM48, 2*64,       TABLE_INFO(lchip, XSecRxHashKeyTable1_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecRx2",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_RX,2, DRV_FTM_SRAM49, 2*64,       TABLE_INFO(lchip, XSecRxHashKeyTable2_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecRx3",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_RX,3, DRV_FTM_SRAM50, 2*64,       TABLE_INFO(lchip, XSecRxHashKeyTable3_t).addrs[0], 0, 0, 8);

    DRV_MEM_REG("XsecTx0",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_TX,0, DRV_FTM_SRAM51, 2*64,       TABLE_INFO(lchip, XSecTxHashKeyTable0_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecTx1",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_TX,0, DRV_FTM_SRAM52, 2*64,       TABLE_INFO(lchip, XSecTxHashKeyTable1_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecTx2",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_TX,0, DRV_FTM_SRAM53, 2*64,       TABLE_INFO(lchip, XSecTxHashKeyTable2_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("XsecTx3",    DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_DYNAMIC_XSEC_TX,0, DRV_FTM_SRAM54, 2*64,       TABLE_INFO(lchip, XSecTxHashKeyTable3_t).addrs[0], 0, 0, 8);

#if (SDK_WORK_PLATFORM == 1)
    DRV_MEM_REG_TCAM("Tcam key0",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL0_KEY, 0,  DRV_FTM_TCAM_KEY0,  512,    0x00000000, 0, 0, 0);
    DRV_MEM_REG_TCAM("Tcam key1",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL0_KEY, 1,  DRV_FTM_TCAM_KEY1,  512,    0x01000000, 0, 0, 0);
    DRV_MEM_REG_TCAM("Tcam key2",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL1_KEY, 0,  DRV_FTM_TCAM_KEY2,  2*1024, 0x02000000, 0, 0, 1);
    DRV_MEM_REG_TCAM("Tcam key3",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL1_KEY, 1,  DRV_FTM_TCAM_KEY3,  2*1024, 0x03000000, 0, 0, 1);
    DRV_MEM_REG_TCAM("Tcam key4",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  0,  DRV_FTM_TCAM_KEY4,  2*512,  0x04000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key5",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  1,  DRV_FTM_TCAM_KEY5,  2*512,  0x05000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key6",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  2,  DRV_FTM_TCAM_KEY6,  2*512,  0x06000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key7",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  3,  DRV_FTM_TCAM_KEY7,  2*512,  0x07000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key8",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  4,  DRV_FTM_TCAM_KEY8,  2*512,  0x08000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key9",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  5,  DRV_FTM_TCAM_KEY9,  2*512,  0x09000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key10", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  6,  DRV_FTM_TCAM_KEY10, 2*512,  0x0A000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key11", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  7,  DRV_FTM_TCAM_KEY11, 2*512,  0x0B000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key12", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  8,  DRV_FTM_TCAM_KEY12, 2*512,  0x0C000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key13", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  9,  DRV_FTM_TCAM_KEY13, 2*512,  0x0D000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key14", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  10, DRV_FTM_TCAM_KEY14, 2*512,  0x0E000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key15", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  11, DRV_FTM_TCAM_KEY15, 2*512,  0x0F000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key16", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  12, DRV_FTM_TCAM_KEY16, 2*512,  0x10000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key17", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  13, DRV_FTM_TCAM_KEY17, 2*512,  0x11000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key18", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  14, DRV_FTM_TCAM_KEY18, 2*512,  0x12000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key19", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  15, DRV_FTM_TCAM_KEY19, 2*512,  0x13000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key20", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  16, DRV_FTM_TCAM_KEY20, 2*512,  0x14000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key21", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  17, DRV_FTM_TCAM_KEY21, 2*512,  0x15000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key22", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  18, DRV_FTM_TCAM_KEY22, 2*512,  0x16000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key23", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  19, DRV_FTM_TCAM_KEY23, 2*512,  0x17000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key24", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  20, DRV_FTM_TCAM_KEY24, 2*512,  0x18000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key25", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  21, DRV_FTM_TCAM_KEY25, 2*512,  0x19000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key26", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  22, DRV_FTM_TCAM_KEY26, 2*512,  0x1A000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key27", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  23, DRV_FTM_TCAM_KEY27, 2*512,  0x1B000000, 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key28", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  0,  DRV_FTM_TCAM_KEY28, 2*256,  0x1C000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key29", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  1,  DRV_FTM_TCAM_KEY29, 2*256,  0x1D000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key30", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  2,  DRV_FTM_TCAM_KEY30, 2*256,  0x1E000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key31", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  3,  DRV_FTM_TCAM_KEY31, 2*256,  0x1F000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key32", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  4,  DRV_FTM_TCAM_KEY32, 2*256,  0x1C000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key33", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  5,  DRV_FTM_TCAM_KEY33, 2*256,  0x1D000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key34", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  6,  DRV_FTM_TCAM_KEY34, 2*256,  0x1E000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key35", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  7,  DRV_FTM_TCAM_KEY35, 2*256,  0x1F000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key36", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  8,  DRV_FTM_TCAM_KEY36, 2*256,  0x20000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key37", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  9,  DRV_FTM_TCAM_KEY37, 2*256,  0x21000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key38", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  10, DRV_FTM_TCAM_KEY38, 2*256,  0x22000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key39", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  11, DRV_FTM_TCAM_KEY39, 2*256,  0x23000000, 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key40", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_SCL_KEY,  0,  DRV_FTM_TCAM_KEY40, 256,    0x30000000, 0, 0, 4);
    DRV_MEM_REG_TCAM("Tcam key41", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_SCL_KEY,  1,  DRV_FTM_TCAM_KEY41, 256,    0x31000000, 0, 0, 4);
#else
    DRV_MEM_REG_TCAM("Tcam key0",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL0_KEY, 0,  DRV_FTM_TCAM_KEY0,  512,    IgrSclTcam0KeyBlockBase(0), 0, 0, 0);
    DRV_MEM_REG_TCAM("Tcam key1",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL0_KEY, 1,  DRV_FTM_TCAM_KEY1,  512,    IgrSclTcam0KeyBlockBase(1), 0, 0, 0);
    DRV_MEM_REG_TCAM("Tcam key2",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL1_KEY, 0,  DRV_FTM_TCAM_KEY2,  2*1024, IgrSclTcam1KeyBlockBase(0), 0, 0, 1);
    DRV_MEM_REG_TCAM("Tcam key3",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_SCL1_KEY, 1,  DRV_FTM_TCAM_KEY3,  2*1024, IgrSclTcam1KeyBlockBase(1), 0, 0, 1);
    DRV_MEM_REG_TCAM("Tcam key4",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  0,  DRV_FTM_TCAM_KEY4,  2*512,  IgrAclTcamKeyBlockBase(0),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key5",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  1,  DRV_FTM_TCAM_KEY5,  2*512,  IgrAclTcamKeyBlockBase(1),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key6",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  2,  DRV_FTM_TCAM_KEY6,  2*512,  IgrAclTcamKeyBlockBase(2),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key7",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  3,  DRV_FTM_TCAM_KEY7,  2*512,  IgrAclTcamKeyBlockBase(3),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key8",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  4,  DRV_FTM_TCAM_KEY8,  2*512,  IgrAclTcamKeyBlockBase(4),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key9",  DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  5,  DRV_FTM_TCAM_KEY9,  2*512,  IgrAclTcamKeyBlockBase(5),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key10", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  6,  DRV_FTM_TCAM_KEY10, 2*512,  IgrAclTcamKeyBlockBase(6),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key11", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  7,  DRV_FTM_TCAM_KEY11, 2*512,  IgrAclTcamKeyBlockBase(7),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key12", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  8,  DRV_FTM_TCAM_KEY12, 2*512,  IgrAclTcamKeyBlockBase(8),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key13", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  9,  DRV_FTM_TCAM_KEY13, 2*512,  IgrAclTcamKeyBlockBase(9),  0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key14", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  10, DRV_FTM_TCAM_KEY14, 2*512,  IgrAclTcamKeyBlockBase(10), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key15", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  11, DRV_FTM_TCAM_KEY15, 2*512,  IgrAclTcamKeyBlockBase(11), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key16", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  12, DRV_FTM_TCAM_KEY16, 2*512,  IgrAclTcamKeyBlockBase(12), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key17", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  13, DRV_FTM_TCAM_KEY17, 2*512,  IgrAclTcamKeyBlockBase(13), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key18", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  14, DRV_FTM_TCAM_KEY18, 2*512,  IgrAclTcamKeyBlockBase(14), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key19", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  15, DRV_FTM_TCAM_KEY19, 2*512,  IgrAclTcamKeyBlockBase(15), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key20", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  16, DRV_FTM_TCAM_KEY20, 2*512,  IgrAclTcamKeyBlockBase(16), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key21", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  17, DRV_FTM_TCAM_KEY21, 2*512,  IgrAclTcamKeyBlockBase(17), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key22", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  18, DRV_FTM_TCAM_KEY22, 2*512,  IgrAclTcamKeyBlockBase(18), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key23", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  19, DRV_FTM_TCAM_KEY23, 2*512,  IgrAclTcamKeyBlockBase(19), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key24", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  20, DRV_FTM_TCAM_KEY24, 2*512,  IgrAclTcamKeyBlockBase(20), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key25", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  21, DRV_FTM_TCAM_KEY25, 2*512,  IgrAclTcamKeyBlockBase(21), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key26", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  22, DRV_FTM_TCAM_KEY26, 2*512,  IgrAclTcamKeyBlockBase(22), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key27", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_I_ACL_KEY,  23, DRV_FTM_TCAM_KEY27, 2*512,  IgrAclTcamKeyBlockBase(23), 0, 0, 2);
    DRV_MEM_REG_TCAM("Tcam key28", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  0,  DRV_FTM_TCAM_KEY28, 2*256,  EgrAclTcamKeyBlockBase(0),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key29", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  1,  DRV_FTM_TCAM_KEY29, 2*256,  EgrAclTcamKeyBlockBase(1),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key30", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  2,  DRV_FTM_TCAM_KEY30, 2*256,  EgrAclTcamKeyBlockBase(2),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key31", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  3,  DRV_FTM_TCAM_KEY31, 2*256,  EgrAclTcamKeyBlockBase(3),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key32", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  4,  DRV_FTM_TCAM_KEY32, 2*256,  EgrAclTcamKeyBlockBase(4),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key33", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  5,  DRV_FTM_TCAM_KEY33, 2*256,  EgrAclTcamKeyBlockBase(5),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key34", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  6,  DRV_FTM_TCAM_KEY34, 2*256,  EgrAclTcamKeyBlockBase(6),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key35", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  7,  DRV_FTM_TCAM_KEY35, 2*256,  EgrAclTcamKeyBlockBase(7),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key36", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  8,  DRV_FTM_TCAM_KEY36, 2*256,  EgrAclTcamKeyBlockBase(8),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key37", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  9,  DRV_FTM_TCAM_KEY37, 2*256,  EgrAclTcamKeyBlockBase(9),  0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key38", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  10, DRV_FTM_TCAM_KEY38, 2*256,  EgrAclTcamKeyBlockBase(10), 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key39", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_ACL_KEY,  11, DRV_FTM_TCAM_KEY39, 2*256,  EgrAclTcamKeyBlockBase(11), 0, 0, 3);
    DRV_MEM_REG_TCAM("Tcam key40", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_SCL_KEY,  0,  DRV_FTM_TCAM_KEY40, 256,    EgrSclTcamKeyBlockBase(0), 0, 0, 4);
    DRV_MEM_REG_TCAM("Tcam key41", DRV_FTM_MEM_TCAM, DRV_FTM_MEM_TCAM_E_SCL_KEY,  1,  DRV_FTM_TCAM_KEY41, 256,    EgrSclTcamKeyBlockBase(1), 0, 0, 4);
#endif
    DRV_MEM_REG("Tcam AD0",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 0,  DRV_FTM_TCAM_AD0,  2*512,  TABLE_INFO(lchip, DsUserIdHash0TcamAdMem_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("Tcam AD1",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 1,  DRV_FTM_TCAM_AD1,  2*512,  TABLE_INFO(lchip, DsUserIdHash1TcamAdMem_t).addrs[0], 0, 0, 8);
    DRV_MEM_REG("Tcam AD2",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 2,  DRV_FTM_TCAM_AD2,  2*1024, TABLE_INFO(lchip, DsUserIdTcam0AdMem_t).addrs[0],     0, 0, 8);
    DRV_MEM_REG("Tcam AD3",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 3,  DRV_FTM_TCAM_AD3,  2*1024, TABLE_INFO(lchip, DsUserIdTcam1AdMem_t).addrs[0],     0, 0, 8);
    DRV_MEM_REG("Tcam AD4",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 4,  DRV_FTM_TCAM_AD4,  2*512,  IgrAclTcamAdBlockBase(0),  0, 0, 9);
    DRV_MEM_REG("Tcam AD5",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 5,  DRV_FTM_TCAM_AD5,  2*512,  IgrAclTcamAdBlockBase(1),  0, 0, 9);
    DRV_MEM_REG("Tcam AD6",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 6,  DRV_FTM_TCAM_AD6,  2*512,  IgrAclTcamAdBlockBase(2),  0, 0, 9);
    DRV_MEM_REG("Tcam AD7",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 7,  DRV_FTM_TCAM_AD7,  2*512,  IgrAclTcamAdBlockBase(3),  0, 0, 9);
    DRV_MEM_REG("Tcam AD8",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 8,  DRV_FTM_TCAM_AD8,  2*512,  IgrAclTcamAdBlockBase(4),  0, 0, 9);
    DRV_MEM_REG("Tcam AD9",  DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 9,  DRV_FTM_TCAM_AD9,  2*512,  IgrAclTcamAdBlockBase(5),  0, 0, 9);
    DRV_MEM_REG("Tcam AD10", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 10, DRV_FTM_TCAM_AD10, 2*512,  IgrAclTcamAdBlockBase(6),  0, 0, 9);
    DRV_MEM_REG("Tcam AD11", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 11, DRV_FTM_TCAM_AD11, 2*512,  IgrAclTcamAdBlockBase(7),  0, 0, 9);
    DRV_MEM_REG("Tcam AD12", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 12, DRV_FTM_TCAM_AD12, 2*512,  IgrAclTcamAdBlockBase(8),  0, 0, 9);
    DRV_MEM_REG("Tcam AD13", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 13, DRV_FTM_TCAM_AD13, 2*512,  IgrAclTcamAdBlockBase(9),  0, 0, 9);
    DRV_MEM_REG("Tcam AD14", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 14, DRV_FTM_TCAM_AD14, 2*512,  IgrAclTcamAdBlockBase(10), 0, 0, 9);
    DRV_MEM_REG("Tcam AD15", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 15, DRV_FTM_TCAM_AD15, 2*512,  IgrAclTcamAdBlockBase(11), 0, 0, 9);
    DRV_MEM_REG("Tcam AD16", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 16, DRV_FTM_TCAM_AD16, 2*512,  IgrAclTcamAdBlockBase(12), 0, 0, 9);
    DRV_MEM_REG("Tcam AD17", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 17, DRV_FTM_TCAM_AD17, 2*512,  IgrAclTcamAdBlockBase(13), 0, 0, 9);
    DRV_MEM_REG("Tcam AD18", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 18, DRV_FTM_TCAM_AD18, 2*512,  IgrAclTcamAdBlockBase(14), 0, 0, 9);
    DRV_MEM_REG("Tcam AD19", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 19, DRV_FTM_TCAM_AD19, 2*512,  IgrAclTcamAdBlockBase(15), 0, 0, 9);
    DRV_MEM_REG("Tcam AD20", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 20, DRV_FTM_TCAM_AD20, 2*512,  IgrAclTcamAdBlockBase(16), 0, 0, 9);
    DRV_MEM_REG("Tcam AD21", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 21, DRV_FTM_TCAM_AD21, 2*512,  IgrAclTcamAdBlockBase(17), 0, 0, 9);
    DRV_MEM_REG("Tcam AD22", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 22, DRV_FTM_TCAM_AD22, 2*512,  IgrAclTcamAdBlockBase(18), 0, 0, 9);
    DRV_MEM_REG("Tcam AD23", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 23, DRV_FTM_TCAM_AD23, 2*512,  IgrAclTcamAdBlockBase(19), 0, 0, 9);
    DRV_MEM_REG("Tcam AD24", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 24, DRV_FTM_TCAM_AD24, 2*512,  IgrAclTcamAdBlockBase(20), 0, 0, 9);
    DRV_MEM_REG("Tcam AD25", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 25, DRV_FTM_TCAM_AD25, 2*512,  IgrAclTcamAdBlockBase(21), 0, 0, 9);
    DRV_MEM_REG("Tcam AD26", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 26, DRV_FTM_TCAM_AD26, 2*512,  IgrAclTcamAdBlockBase(22), 0, 0, 9);
    DRV_MEM_REG("Tcam AD27", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 27, DRV_FTM_TCAM_AD27, 2*512,  IgrAclTcamAdBlockBase(23), 0, 0, 9);
    DRV_MEM_REG("Tcam AD28", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 28, DRV_FTM_TCAM_AD28, 256,    EgrAclTcamAdBlockBase(0),  0, 0, 5);
    DRV_MEM_REG("Tcam AD29", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 29, DRV_FTM_TCAM_AD29, 256,    EgrAclTcamAdBlockBase(1),  0, 0, 5);
    DRV_MEM_REG("Tcam AD30", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 30, DRV_FTM_TCAM_AD30, 256,    EgrAclTcamAdBlockBase(2),  0, 0, 5);
    DRV_MEM_REG("Tcam AD31", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 31, DRV_FTM_TCAM_AD31, 256,    EgrAclTcamAdBlockBase(3),  0, 0, 5);
    DRV_MEM_REG("Tcam AD32", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 32, DRV_FTM_TCAM_AD32, 256,    EgrAclTcamAdBlockBase(4),  0, 0, 5);
    DRV_MEM_REG("Tcam AD33", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 33, DRV_FTM_TCAM_AD33, 256,    EgrAclTcamAdBlockBase(5),  0, 0, 5);
    DRV_MEM_REG("Tcam AD34", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 34, DRV_FTM_TCAM_AD34, 256,    EgrAclTcamAdBlockBase(6),  0, 0, 5);
    DRV_MEM_REG("Tcam AD35", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 35, DRV_FTM_TCAM_AD35, 256,    EgrAclTcamAdBlockBase(7),  0, 0, 5);
    DRV_MEM_REG("Tcam AD36", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 36, DRV_FTM_TCAM_AD36, 256,    EgrAclTcamAdBlockBase(8),  0, 0, 5);
    DRV_MEM_REG("Tcam AD37", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 37, DRV_FTM_TCAM_AD37, 256,    EgrAclTcamAdBlockBase(9),  0, 0, 5);
    DRV_MEM_REG("Tcam AD38", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 38, DRV_FTM_TCAM_AD38, 256,    EgrAclTcamAdBlockBase(10), 0, 0, 5);
    DRV_MEM_REG("Tcam AD39", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 39, DRV_FTM_TCAM_AD39, 256,    EgrAclTcamAdBlockBase(11), 0, 0, 5);
    DRV_MEM_REG("Tcam AD40", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 40, DRV_FTM_TCAM_AD40, 256,    TABLE_INFO(lchip, DsEgressScl0TcamAd_t).addrs[0], 0, 0, 3);
    DRV_MEM_REG("Tcam AD41", DRV_FTM_MEM_DYNAMIC, DRV_FTM_MEM_TCAM_FLOW_AD, 41, DRV_FTM_TCAM_AD41, 256,    TABLE_INFO(lchip, DsEgressScl1TcamAd_t).addrs[0], 0, 0, 3);

#ifdef EMULATION_ENV
    DRV_MEM_REG("LPM key0" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  0,  DRV_FTM_LPM_TCAM_KEY0, 128, LpmTcam0KeyBlockBase(0), 0, 0, 5);
    DRV_MEM_REG("LPM key1" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  1,  DRV_FTM_LPM_TCAM_KEY1,   0, LpmTcam0KeyBlockBase(1), 0, 0, 5);
    DRV_MEM_REG("LPM key2" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  2,  DRV_FTM_LPM_TCAM_KEY2, 128, LpmTcam0KeyBlockBase(2), 0, 0, 5);
    DRV_MEM_REG("LPM key3" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  3,  DRV_FTM_LPM_TCAM_KEY3,   0, LpmTcam0KeyBlockBase(3), 0, 0, 5);
    DRV_MEM_REG("LPM key4" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  4,  DRV_FTM_LPM_TCAM_KEY4, 128, LpmTcam1KeyBlockBase(0), 0, 0, 5);
    DRV_MEM_REG("LPM key5" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  5,  DRV_FTM_LPM_TCAM_KEY5,   0, LpmTcam1KeyBlockBase(1), 0, 0, 5);


    DRV_MEM_REG("LPM Ad0"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  0,  DRV_FTM_LPM_TCAM_AD0,  128, DRV_LPM_TCAM_AD0_BASE(0), 0, 0, 2);
    DRV_MEM_REG("LPM Ad1"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  1,  DRV_FTM_LPM_TCAM_AD1,    0, DRV_LPM_TCAM_AD0_BASE(1), 0, 0, 2);
    DRV_MEM_REG("LPM Ad2"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  2,  DRV_FTM_LPM_TCAM_AD2,  128, DRV_LPM_TCAM_AD0_BASE(2), 0, 0, 2);
    DRV_MEM_REG("LPM Ad3"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  3,  DRV_FTM_LPM_TCAM_AD3,    0, DRV_LPM_TCAM_AD0_BASE(3), 0, 0, 2);
    DRV_MEM_REG("LPM Ad4"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  4,  DRV_FTM_LPM_TCAM_AD4,  128, DRV_LPM_TCAM_AD0_BASE(4), 0, 0, 2);
    DRV_MEM_REG("LPM Ad5"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  5,  DRV_FTM_LPM_TCAM_AD5,    0, DRV_LPM_TCAM_AD0_BASE(5), 0, 0, 2);

#elif (SDK_WORK_PLATFORM == 1)
    DRV_MEM_REG_TCAM("LPM key0" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  0,  DRV_FTM_LPM_TCAM_KEY0, 4*1024, 0x40000000, 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key1" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  1,  DRV_FTM_LPM_TCAM_KEY1, 4*1024, 0x41000000, 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key2" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  2,  DRV_FTM_LPM_TCAM_KEY2, 4*1024, 0x42000000, 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key3" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  3,  DRV_FTM_LPM_TCAM_KEY3, 4*1024, 0x43000000, 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key4" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  4,  DRV_FTM_LPM_TCAM_KEY4, 2*1024, 0x44000000, 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key5" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  5,  DRV_FTM_LPM_TCAM_KEY5, 2*1024, 0x45000000, 0, 0, 5);

    DRV_MEM_REG("LPM Ad0"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  0,  DRV_FTM_LPM_TCAM_AD0,  4*1024, DRV_LPM_TCAM_AD0_BASE(0), 0, 0, 2);
    DRV_MEM_REG("LPM Ad1"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  1,  DRV_FTM_LPM_TCAM_AD1,  4*1024, DRV_LPM_TCAM_AD0_BASE(1), 0, 0, 2);
    DRV_MEM_REG("LPM Ad2"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  2,  DRV_FTM_LPM_TCAM_AD2,  4*1024, DRV_LPM_TCAM_AD0_BASE(2), 0, 0, 2);
    DRV_MEM_REG("LPM Ad3"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  3,  DRV_FTM_LPM_TCAM_AD3,  4*1024, DRV_LPM_TCAM_AD0_BASE(3), 0, 0, 2);
    DRV_MEM_REG("LPM Ad4"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  4,  DRV_FTM_LPM_TCAM_AD4,  2*1024, DRV_LPM_TCAM_AD0_BASE(4), 0, 0, 2);
    DRV_MEM_REG("LPM Ad5"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  5,  DRV_FTM_LPM_TCAM_AD5,  2*1024, DRV_LPM_TCAM_AD0_BASE(5), 0, 0, 2);
#else
    DRV_MEM_REG_TCAM("LPM key0" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  0,  DRV_FTM_LPM_TCAM_KEY0, 4*1024, LpmTcam0KeyBlockBase(0), 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key1" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  1,  DRV_FTM_LPM_TCAM_KEY1, 4*1024, LpmTcam0KeyBlockBase(1), 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key2" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  2,  DRV_FTM_LPM_TCAM_KEY2, 4*1024, LpmTcam0KeyBlockBase(2), 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key3" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  3,  DRV_FTM_LPM_TCAM_KEY3, 4*1024, LpmTcam0KeyBlockBase(3), 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key4" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  4,  DRV_FTM_LPM_TCAM_KEY4, 2*1024, LpmTcam1KeyBlockBase(0), 0, 0, 5);
    DRV_MEM_REG_TCAM("LPM key5" ,  DRV_FTM_MEM_TCAM,   DRV_FTM_MEM_TCAM_LPM_KEY,  5,  DRV_FTM_LPM_TCAM_KEY5, 2*1024, LpmTcam1KeyBlockBase(1), 0, 0, 5);

    DRV_MEM_REG("LPM Ad0"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  0,  DRV_FTM_LPM_TCAM_AD0,  4*1024, DRV_LPM_TCAM_AD0_BASE(0), 0, 0, 2);
    DRV_MEM_REG("LPM Ad1"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  1,  DRV_FTM_LPM_TCAM_AD1,  4*1024, DRV_LPM_TCAM_AD0_BASE(1), 0, 0, 2);
    DRV_MEM_REG("LPM Ad2"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  2,  DRV_FTM_LPM_TCAM_AD2,  4*1024, DRV_LPM_TCAM_AD0_BASE(2), 0, 0, 2);
    DRV_MEM_REG("LPM Ad3"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  3,  DRV_FTM_LPM_TCAM_AD3,  4*1024, DRV_LPM_TCAM_AD0_BASE(3), 0, 0, 2);
    DRV_MEM_REG("LPM Ad4"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  4,  DRV_FTM_LPM_TCAM_AD4,  2*1024, DRV_LPM_TCAM_AD0_BASE(4), 0, 0, 2);
    DRV_MEM_REG("LPM Ad5"  ,  DRV_FTM_MEM_DYNAMIC,   DRV_FTM_MEM_TCAM_LPM_AD,  5,  DRV_FTM_LPM_TCAM_AD5,  2*1024, DRV_LPM_TCAM_AD0_BASE_1(9), 0, 0, 2);
#endif


#if (SDK_WORK_PLATFORM == 1)
    DRV_MEM_REG_TCAM("Cid Tcam",      DRV_FTM_MEM_TCAM_CID_KEY, DRV_FTM_MEM_TCAM_CID_KEY, 0, DRV_FTM_CID_TCAM,     TABLE_MAX_INDEX(lchip, IpeCidTcamMem_t),             0x50000000, 0, 0, 6);
    DRV_MEM_REG_TCAM("Ltid Tcam",     DRV_FTM_MEM_LTID,         DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_SEL_TCAM,     TABLE_MAX_INDEX(lchip, DsLtidSelectTcamMem_t),       0x51000000, 0, 0, 7);
    DRV_MEM_REG_TCAM("EPE Ltid Tcam", DRV_FTM_MEM_LTID1,        DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_SEL_TCAM_EGR, TABLE_MAX_INDEX(lchip, DsEgrLtidSelectTcamMem_t),    0x52000000, 0, 0, 8);
    DRV_MEM_REG_TCAM("Vmac Tcam",     DRV_FTM_MEM_RT_MAC,       DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_RMAC_TCAM,    TABLE_MAX_INDEX(lchip, IpeHdrAdjRouterMacTcamMem_t), 0x53000000, 0, 0, 9);
    DRV_MEM_REG_TCAM("Udf Tcam",      DRV_FTM_MEM_UDF,          DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_UDF_TCAM,     TABLE_MAX_INDEX(lchip, IpeHdrAdjUdfTcamMem_t),       0x54000000, 0, 0, 10);
#else
    DRV_MEM_REG_TCAM("Cid Tcam",      DRV_FTM_MEM_TCAM_CID_KEY, DRV_FTM_MEM_TCAM_CID_KEY, 0, DRV_FTM_CID_TCAM,     TABLE_MAX_INDEX(lchip, IpeCidTcamMem_t),             TABLE_INFO(lchip, IpeCidTcamMem_t).addrs[0],             0, 0, 6);
    DRV_MEM_REG_TCAM("Ltid Tcam",     DRV_FTM_MEM_LTID,         DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_SEL_TCAM,     TABLE_MAX_INDEX(lchip, DsLtidSelectTcamMem_t),       TABLE_INFO(lchip, DsLtidSelectTcamMem_t).addrs[0],       0, 0, 7);
    DRV_MEM_REG_TCAM("EPE Ltid Tcam", DRV_FTM_MEM_LTID1,        DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_SEL_TCAM_EGR, TABLE_MAX_INDEX(lchip, DsEgrLtidSelectTcamMem_t),    TABLE_INFO(lchip, DsEgrLtidSelectTcamMem_t).addrs[0],    0, 0, 8);
    DRV_MEM_REG_TCAM("Vmac Tcam",     DRV_FTM_MEM_RT_MAC,       DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_RMAC_TCAM,    TABLE_MAX_INDEX(lchip, IpeHdrAdjRouterMacTcamMem_t), TABLE_INFO(lchip, IpeHdrAdjRouterMacTcamMem_t).addrs[0], 0, 0, 9);
    DRV_MEM_REG_TCAM("Udf Tcam",      DRV_FTM_MEM_UDF,          DRV_FTM_MEM_DYNAMIC_KEY,  0, DRV_FTM_UDF_TCAM,     TABLE_MAX_INDEX(lchip, IpeHdrAdjUdfTcamMem_t),       TABLE_INFO(lchip, IpeHdrAdjUdfTcamMem_t).addrs[0],       0, 0, 10);
#endif

    _drv_at_mem_cutdown(lchip);

    return 0;
}




int32
drv_enum_init_at(uint8 lchip)
{
    DRV_CONST(DRV_IPFIX_EXPORTREASON_NO_EXPORT)                     =0x0;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_EXPIRED)                       =0x1;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_TCP_SESSION_CLOSE)             =0x2;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_PACKET_COUNT_OVERFLOW)         =0x3;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_DROP_PKT_COUNT_OVERFLOW)       =0x4;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_NEW_FLOW_EXPORT)               =0x5;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_PACKET_DISCARDTYPE_CHANGE)     =0x6;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_TS_COUNT_OVERFLOW)             =0x7;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_JITTER_OVERFLOW)               =0x8;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_LATENCY_OVERFLOW)              =0x9;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_TTL_CHANGE)                    =0xa;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_BYTE_COUNT_OVERFLOW)           =0xb;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_DESTINATION_CHANGE)            =0xc;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_FLUSH_TIMER_EXPORT)            =0xd;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_LATENCY_EVENT)                 =0xe;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_BURST_EVENT)                   =0xf;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_SESSION_PACKET_DROP)           =0x10;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_BUFFER_DROP)                   =0x11;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_QUEUE_BURST)                   =0x12;
    DRV_CONST(DRV_IPFIX_EXPORTREASON_HASH_CONFLICT_EXPORT)          =0x13;



    DRV_CONST(DRV_DS_CATEGORY_ID_PAIR_TCAM_LOOKUP_KEY_BYTES) = 8;
    DRV_CONST(DRV_TCAMKEYTYPE_MACKEY_160)           = 0x0;
    DRV_CONST(DRV_TCAMKEYTYPE_L3KEY_160)            = 0x1;
    DRV_CONST(DRV_TCAMKEYTYPE_L3KEY_320)            = 0x2;
    DRV_CONST(DRV_TCAMKEYTYPE_IPV6KEY_320)          = 0x3;
    DRV_CONST(DRV_TCAMKEYTYPE_IPV6KEY_640)          = 0x4;
    DRV_CONST(DRV_TCAMKEYTYPE_MACL3KEY_320)         = 0x6;
    DRV_CONST(DRV_TCAMKEYTYPE_MACL3KEY_640)         = 0xe;
    DRV_CONST(DRV_TCAMKEYTYPE_MACIPV6KEY_640)       = 0x7;
    DRV_CONST(DRV_TCAMKEYTYPE_CIDKEY_160)           = 0x8;
    DRV_CONST(DRV_TCAMKEYTYPE_SHORTKEY_80)          = 0x9;
    DRV_CONST(DRV_TCAMKEYTYPE_FORWARDKEY_320)       = 0xa;
    DRV_CONST(DRV_TCAMKEYTYPE_FORWARDKEY_640)       = 0xb;
    DRV_CONST(DRV_TCAMKEYTYPE_COPPKEY_320)          = 0xc;
    DRV_CONST(DRV_TCAMKEYTYPE_COPPKEY_640)          = 0xd;
    DRV_CONST(DRV_TCAMKEYTYPE_UDFKEY_320)           = 0x5;
    DRV_CONST(DRV_XC_OAM_HASH_CAM_NUM)      = 0;




    DRV_CONST(DRV_SCL_KEY_TYPE_MACKEY160)           = 0xb;
    DRV_CONST(DRV_SCL_KEY_TYPE_MACL3KEY320)         = 0x3;
    DRV_CONST(DRV_SCL_KEY_TYPE_L3KEY160)            = 0x1;
    DRV_CONST(DRV_SCL_KEY_TYPE_IPV6KEY320)          = 0x2;
    DRV_CONST(DRV_SCL_KEY_TYPE_MACIPV6KEY640)       = 0x7;
    DRV_CONST(DRV_SCL_KEY_TYPE_RESOLVE_CONFLICT)    = 0xf;  /* invalid */
    DRV_CONST(DRV_SCL_KEY_TYPE_UDFKEY160)           = 0x6;
    DRV_CONST(DRV_SCL_KEY_TYPE_UDFKEY320)           = 0x4;
    DRV_CONST(DRV_SCL_KEY_TYPE_UDFKEY640)           = 0x5;
    DRV_CONST(DRV_SCL_KEY_TYPE_MASK)                = 0xF;

    DRV_CONST(DRV_UDFPOSTYPE_NONE)                    = 0x0;
    DRV_CONST(DRV_UDFPOSTYPE_OUTER_L2)                = 0x1;
    DRV_CONST(DRV_UDFPOSTYPE_OUTER_L3)                = 0x2;
    DRV_CONST(DRV_UDFPOSTYPE_OUTER_L4)                = 0x3;
    DRV_CONST(DRV_UDFPOSTYPE_INNER_L2)                = 0x4;
    DRV_CONST(DRV_UDFPOSTYPE_INNER_L3)                = 0x5;
    DRV_CONST(DRV_UDFPOSTYPE_INNER_L4)                = 0x6;

    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_DISABLE )             = 0x0;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_DOUBLEVLANPORT)       = 0x1;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_SVLANPORT)            = 0x2;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_CVLANPORT)            = 0x3;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_SVLANCOSPORT)         = 0x4;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_CVLANCOSPORT)         = 0x5;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_PORTVLANCROSS)        = 0x6;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_PORTCROSS)            = 0x7;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_PORT)                 = 0x8;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_SVLANPORTMAC)         = 0x9;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_TUNNELPBB)            = 0xa;
    DRV_CONST(DRV_EGRESSSCLHASHTYPE_FIDDVPGROUP)            = 0xb;
    DRV_CONST(DRV_EGRESSSCLHASHTYPE_METADATADVPGROUP)       = 0xd;
    DRV_CONST(DRV_EGRESSSCLHASHTYPE_VPPAIR)                 = 0xc;
    DRV_CONST(DRV_EGRESSSCLHASHTYPE_I2ECIDDVPGROUP)         = 0xe;

    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_ETH)                  = 0x1;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_BFD)                  = 0x2;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_MPLSLABEL)            = 0x3;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_MPLSSECTION)          = 0x4;
    DRV_CONST(DRV_EGRESSXCOAMHASHTYPE_RMEP)                 = 0x14;

    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_FCOE)             = 0x0;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_IPV4)             = 0x1;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_IPV6MCAST)        = 0x2;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_IPV6UCAST)        = 0x3;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_MAC)              = 0x4;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_MACIPV6MCAST)     = 0x5;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_TRILL)            = 0x6;
    DRV_CONST(DRV_FIBHOST0PRIMARYHASHTYPE_MACIPV4MCAST)     = 0x7;

    DRV_CONST(DRV_FIBHOST1PRIMARYHASHTYPE_IPV4)             = 0x0;
    DRV_CONST(DRV_FIBHOST1PRIMARYHASHTYPE_IPV6NATDA)        = 0x1;
    DRV_CONST(DRV_FIBHOST1PRIMARYHASHTYPE_IPV6NATSA)        = 0x2;
    DRV_CONST(DRV_FIBHOST1PRIMARYHASHTYPE_OTHER)            = 0x3;

    DRV_CONST(DRV_FLOWHASHTYPE_INVALID)                     = 0x0;
    DRV_CONST(DRV_FLOWHASHTYPE_L2)                          = 0x1;
    DRV_CONST(DRV_FLOWHASHTYPE_L2L3)                        = 0x2;
    DRV_CONST(DRV_FLOWHASHTYPE_L3IPV4)                      = 0x3;
    DRV_CONST(DRV_FLOWHASHTYPE_L3IPV6)                      = 0x4;
    DRV_CONST(DRV_FLOWHASHTYPE_L3MPLS)                      = 0x5;
    DRV_CONST(DRV_FLOWHASHTYPE_NSH)                         = 0x7;

    DRV_CONST(DRV_USERIDHASHTYPE_DISABLE)                   = 0x0;
    DRV_CONST(DRV_USERIDHASHTYPE_DOUBLEVLANPORT)            = 0x1;
    DRV_CONST(DRV_USERIDHASHTYPE_SVLANPORT)                 = 0x2;
    DRV_CONST(DRV_USERIDHASHTYPE_CVLANPORT)                 = 0x3;
    DRV_CONST(DRV_USERIDHASHTYPE_SVLANCOSPORT)              = 0x4;
    DRV_CONST(DRV_USERIDHASHTYPE_CVLANCOSPORT)              = 0x5;
    DRV_CONST(DRV_USERIDHASHTYPE_MACPORT)                   = 0x6;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV4PORT)                  = 0x7;
    DRV_CONST(DRV_USERIDHASHTYPE_MAC)                       = 0x8;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV4SA)                    = 0x9;
    DRV_CONST(DRV_USERIDHASHTYPE_PORT)                      = 0xa;
    DRV_CONST(DRV_USERIDHASHTYPE_SVLANMACSA)                = 0xb;
    DRV_CONST(DRV_USERIDHASHTYPE_SVLAN)                     = 0xc;
    DRV_CONST(DRV_USERIDHASHTYPE_ECIDNAMESPACE)             = 0xd;
    DRV_CONST(DRV_USERIDHASHTYPE_INGECIDNAMESPACE)          = 0xe;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV6SA)                    = 0xf;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV6PORT)                  = 0x10;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV4DA)                    = 0x11;
    DRV_CONST(DRV_USERIDHASHTYPE_IPV6DA)                    = 0x12;
    DRV_CONST(DRV_USERIDHASHTYPE_VLANDSCPPORT)                  = 0x13;
    DRV_CONST(DRV_USERIDHASHTYPE_NSH)                       = 0x14;
    /*DRV_CONST(DRV_USERIDHASHTYPE_CAPWAPSTASTATUS)           = 0x11;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_CAPWAPSTASTATUSMC)         = 0x12;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_CAPWAPMACDAFORWARD)        = 0x13;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_CAPWAPVLANFORWARD)         = 0x14;*/
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4)                = 0x15;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTYPE_START)         = DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4);
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4GREKEY)          = 0x16;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4UDP)             = 0x17;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTRILLUCRPF)          = 0x19;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTRILLUCDECAP)        = 0x1a;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTRILLMCRPF)          = 0x1b;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTRILLMCDECAP)        = 0x1c;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTRILLMCADJ)          = 0x1d;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4RPF)             = 0x1e;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4UCVXLANMODE0)    = 0x1f;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4UCVXLANMODE1)    = 0x20;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6UCVXLANMODE0)    = 0x21;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6UCVXLANMODE1)    = 0x22;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4UCNVGREMODE0)    = 0x23;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4UCNVGREMODE1)    = 0x24;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6UCNVGREMODE0)    = 0x25;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6UCNVGREMODE1)    = 0x26;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4MCVXLANMODE0)    = 0x27;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4VXLANMODE1)      = 0x28;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6MCVXLANMODE0)    = 0x29;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6MCVXLANMODE1)    = 0x2a;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4MCNVGREMODE0)    = 0x2b;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4NVGREMODE1)      = 0x2c;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6MCNVGREMODE0)    = 0x2d;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6MCNVGREMODE1)    = 0x2e;
    /*Duet2 USERIDHASHTYPE_TUNNELIPV4DA)              = 0x33;*/
    /*Duet2 USERIDHASHTYPE_SCLFLOWL2)                 = 0x35;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4CAPWAP)          = 0x2f;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6CAPWAP)          = 0x30;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_TUNNELCAPWAPRMAC)          = 0x31;*/
    /*DRV_CONST(DRV_USERIDHASHTYPE_TUNNELCAPWAPRMACRID)       = 0x32;*/
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELMPLS)                = 0x34;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6)                = 0x33;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6GREKEY)          = 0x34;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6UDP)             = 0x35;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6DA)              = 0x36;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4DA)              = 0x37;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV4CLOUDSEC)        = 0x38;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6CLOUDSEC)        = 0x39;
    DRV_CONST(DRV_USERIDHASHTYPE_TUNNELTYPE_END)        = DRV_CONST(DRV_USERIDHASHTYPE_TUNNELIPV6CLOUDSEC);
    DRV_CONST(DRV_USERIDHASHTYPE_SCLFLOWL2)                 = 0x3a;
    DRV_CONST(DRV_USERIDHASHTYPE_SCLFLOWL2UDF)              = 0x3b;
    DRV_CONST(DRV_USERIDHASHTYPE_SCLFLOWL3UDF)              = 0x3c;
    DRV_CONST(DRV_USERIDHASHTYPE_SCLFLOWTYPE_END)        = DRV_CONST(DRV_USERIDHASHTYPE_SCLFLOWL3UDF);
    DRV_CONST(DRV_USERIDPORTHASHTYPE_DISABLE)               = 0x0;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_DOUBLEVLANPORT)        = 0x1;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SVLANPORT)             = 0x2;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_CVLANPORT)             = 0x3;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SVLANCOSPORT)          = 0x4;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_CVLANCOSPORT)          = 0x5;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_MACPORT)               = 0x6;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_IPSAPORT)              = 0x7;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_MAC)                   = 0x8;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_IPSA)                  = 0x9;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_PORT)                  = 0xa;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SVLANMACSA)            = 0xb;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SVLAN)                 = 0xc;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_ECIDNAMESPACE)         = 0xd;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_INGECIDNAMESPACE)      = 0xe;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_IPDA)                  = 0x11;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SVLANDSCPPORT)         = 0x13;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_NSH)                   = 0x14;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SCLTYPE_END)         = DRV_CONST(DRV_USERIDPORTHASHTYPE_NSH);/* must use lastest hash type, remember!!!!!!!*/
    DRV_CONST(DRV_USERIDPORTHASHTYPE_TUNNEL)                = 0x1d;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_SCLFLOW)               = 0x1e;
    DRV_CONST(DRV_USERIDPORTHASHTYPE_TRILL)                 = 0x1f;

    DRV_CONST(DRV_UDFPOSTYPE_RSV)                     = 0x7;

    DRV_CONST(DRV_STK_MUX_TYPE_HDR_REGULAR_PORT)      = 0x0;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITHOUT_TUNNEL)    = 0x7;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITH_L2)           = 0x8;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITH_L2_AND_IPV4)  = 0xF;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITH_L2_AND_IPV6)  = 0xF;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITH_IPV4)         = 0xF;
    DRV_CONST(DRV_STK_MUX_TYPE_HDR_WITH_IPV6)         = 0xF;

    DRV_CONST(DRV_DMA_PACKET_TX_CHAN_NUM) = 4;
    DRV_CONST(DRV_DMA_PACKET_RX_CHAN_NUM) = 8;
    DRV_CONST(DRV_DMA_PACKET_RX0_CHAN_ID) = 0;
    DRV_CONST(DRV_DMA_PACKET_RX1_CHAN_ID) = 1;
    DRV_CONST(DRV_DMA_PACKET_RX2_CHAN_ID) = 2;
    DRV_CONST(DRV_DMA_PACKET_RX3_CHAN_ID) = 3;
    DRV_CONST(DRV_DMA_PACKET_RX4_CHAN_ID) = 4;
    DRV_CONST(DRV_DMA_PACKET_RX5_CHAN_ID) = 5;
    DRV_CONST(DRV_DMA_PACKET_RX6_CHAN_ID) = 6;
    DRV_CONST(DRV_DMA_PACKET_RX7_CHAN_ID) = 7;
    DRV_CONST(DRV_DMA_PACKET_TX0_CHAN_ID) = 8;
    DRV_CONST(DRV_DMA_PACKET_TX1_CHAN_ID) = 9;
    DRV_CONST(DRV_DMA_PACKET_TX2_CHAN_ID) = 10;
    DRV_CONST(DRV_DMA_PACKET_TX3_CHAN_ID) = 11;
    DRV_CONST(DRV_DMA_TBL_RD_CHAN_ID)     = 12;
    DRV_CONST(DRV_DMA_PORT_STATS_CHAN_ID) = 13;
    DRV_CONST(DRV_DMA_FLOW_STATS_CHAN_ID) = 14;
    DRV_CONST(DRV_DMA_BUF_SCAN_CHAN_ID)   = 15;
    DRV_CONST(DRV_DMA_REG_MAX_CHAN_ID)    = 0xFF;
    DRV_CONST(DRV_DMA_TBL_RD1_CHAN_ID)    = 16;
    DRV_CONST(DRV_DMA_TBL_RD2_CHAN_ID)    = 17;
    DRV_CONST(DRV_DMA_TBL_WR_CHAN_ID)     = 18;
    DRV_CONST(DRV_DMA_TBL_WR1_CHAN_ID)    = 19;
    DRV_CONST(DRV_DMA_LEARNING_CHAN_ID)   = 20;
    DRV_CONST(DRV_DMA_HASHKEY_CHAN_ID)    = 21;
    DRV_CONST(DRV_DMA_IPFIX_CHAN_ID)      = 22;
    DRV_CONST(DRV_DMA_BUFFER_CHAN_ID)     = 23;
    DRV_CONST(DRV_DMA_LATENCY_CHAN_ID)    = 24;
    DRV_CONST(DRV_DMA_EFD_CHAN_ID)        = 25;
    DRV_CONST(DRV_DMA_OAM_CHAN_ID)        = 26;
    DRV_CONST(DRV_DMA_SC_OAM_CHAN_ID)     = 27;
    DRV_CONST(DRV_DMA_TCAM_SCAN_CHAN_ID)  = 28;
    DRV_CONST(DRV_DMA_BATCH_CHAN_ID)  = 29;
    /* Unused for TsingMa.MX start */
    DRV_CONST(DRV_DMA_SDC_CHAN_ID)        = 0xFFFFFFFF;
    DRV_CONST(DRV_DMA_MONITOR_CHAN_ID)    = 0xFFFFFFFF;
    /* Unused for TsingMa.MX end */
    DRV_CONST(DRV_DMA_PKT_TX_TIMER_CHAN_ID) = 11;

    DRV_CONST(DRV_DMA_MAX_CHAN_ID)        = 30;

    DRV_CONST(DRV_FLOWPORTTYPE_BITMAP)                      = 0x0;
    DRV_CONST(DRV_FLOWPORTTYPE_GPORT)                       = 0x1;
    DRV_CONST(DRV_FLOWPORTTYPE_LPORT)                       = 0x2;
    DRV_CONST(DRV_FLOWPORTTYPE_METADATA)                    = 0x3;

    DRV_CONST(DRV_FIBNATPBRTCAMKEYTYPE_IPV4PBR)             = 0x0;
    DRV_CONST(DRV_FIBNATPBRTCAMKEYTYPE_IPV6PBR)             = 0x1;
    DRV_CONST(DRV_FIBNATPBRTCAMKEYTYPE_IPV4NAT)             = 0x2;
    DRV_CONST(DRV_FIBNATPBRTCAMKEYTYPE_IPV6NAT)             = 0x3;

    DRV_CONST(DRV_UDFTYPE_L2UDF)                            = 0x0;
    DRV_CONST(DRV_UDFTYPE_L3UDF)                            = 0x1;
    DRV_CONST(DRV_UDFTYPE_L4UDF)                            = 0x2;
    DRV_CONST(DRV_UDFTYPE_METADATA)                         = 0x3;

    DRV_CONST(DRV_VLANIDACTIONTYPE_NONE)                    = 0x0;
    DRV_CONST(DRV_VLANIDACTIONTYPE_SWAP)                    = 0x1;
    DRV_CONST(DRV_VLANIDACTIONTYPE_USER)                    = 0x2;

    DRV_CONST(DRV_VTAGACTIONTYPE_NONE)                      = 0x0;
    DRV_CONST(DRV_VTAGACTIONTYPE_MODIFY)                    = 0x3;
    DRV_CONST(DRV_VTAGACTIONTYPE_ADD)                       = 0x1;
    DRV_CONST(DRV_VTAGACTIONTYPE_DELETE)                    = 0x2;

    DRV_CONST(DRV_GEMHASHTYPE_PORT)                         = 0x1;

    DRV_CONST(DRV_IPFIXHASHTYPE_INVALID)                    = 0x0;
    DRV_CONST(DRV_IPFIXHASHTYPE_L2)                         = 0x1;
    DRV_CONST(DRV_IPFIXHASHTYPE_L2L3)                       = 0x2;
    DRV_CONST(DRV_IPFIXHASHTYPE_L3IPV4)                     = 0x3;
    DRV_CONST(DRV_IPFIXHASHTYPE_L3IPV6)                     = 0x4;
    DRV_CONST(DRV_IPFIXHASHTYPE_L3MPLS)                     = 0x5;
    DRV_CONST(DRV_IPFIXHASHTYPE_L3IPV4SHORT)                = 0x6;
    DRV_CONST(DRV_IPFIXHASHTYPE_L3IPV6SHORT)                = 0x7;
    DRV_CONST(DRV_IPFIXHASHTYPE_UDFSHORT)                   = 0x8;
    DRV_CONST(DRV_IPFIXHASHTYPE_UDF)                        = 0x9;
    DRV_CONST(DRV_IPFIXHASHTYPE_NSH)                        = 0xa;
    DRV_CONST(DRV_IPFIXHASHTYPE_NSHSHORT)                   = 0xb;

    DRV_CONST(DRV_MPLSHASHTYPE_LABEL)                       = 0x0;

    DRV_CONST(DRV_OAMHASHTYPE_ETH)                          = 0x0;
    DRV_CONST(DRV_OAMHASHTYPE_BFD)                          = 0x1;
    DRV_CONST(DRV_OAMHASHTYPE_MPLSLABEL)                    = 0x2;
    DRV_CONST(DRV_OAMHASHTYPE_MPLSSECTION)                  = 0x3;
    DRV_CONST(DRV_OAMHASHTYPE_RMEP)                         = 0x4;

    DRV_CONST(DRV_FIBHOST0HASHTYPE_FCOE)                    = 0x0;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_IPV4)                    = 0x1;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_IPV6MCAST)               = 0x2;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_IPV6UCAST)               = 0x3;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_MAC)                     = 0x4;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_MACIPV6MCAST)            = 0x5;
    DRV_CONST(DRV_FIBHOST0HASHTYPE_TRILL)                   = 0x6;

    DRV_CONST(DRV_FIBHOST1HASHTYPE_FCOERPF)                 = 0x0;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV4MCAST)               = 0x1;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV4NATDAPORT)           = 0x2;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV4NATSAPORT)           = 0x3;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV6MCAST)               = 0x4;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV6NATDAPORT)           = 0x5;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_IPV6NATSAPORT)           = 0x6;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_MACIPV4MCAST)            = 0x7;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_MACIPV6MCAST)            = 0x8;
    DRV_CONST(DRV_FIBHOST1HASHTYPE_TRILLMCASTVLAN)          = 0x9;
    DRV_CONST(DRV_FIB_HOST0_CAM_NUM)        = 32;
    DRV_CONST(DRV_FIB_HOST1_CAM_NUM)        = 32;
    DRV_CONST(DRV_FLOW_HASH_CAM_NUM)        = 32;
    DRV_CONST(DRV_USER_ID_HASH_CAM_NUM)     = 0;
    DRV_CONST(DRV_MPLS_HASH_CAM_NUM)        = 64;
    DRV_CONST(DRV_OAM_HASH_CAM_NUM)         = 64;
    DRV_CONST(DRV_RMEP_HASH_CAM_NUM)        = 32;
    DRV_CONST(DRV_GEM_PORT_HASH_CAM_NUM)    = 0;
    DRV_CONST(DRV_DOT1AE_HASH_CAM_NUM)      = 8;

    DRV_CONST(DRV_L2EDITTYPE_NONE)          = 0x0;
    DRV_CONST(DRV_L2EDITTYPE_ADDETH1X)      = 0x1;
    DRV_CONST(DRV_L2EDITTYPE_ADDETH2X)      = 0x2;
    DRV_CONST(DRV_L2EDITTYPE_ADDRAW)        = 0x3;
    DRV_CONST(DRV_L2EDITTYPE_AUTOETH1X)     = 0x4;
    DRV_CONST(DRV_L2EDITTYPE_AUTOETH2X)     = 0x5;
    DRV_CONST(DRV_L2EDITTYPE_RWETH1X)       = 0x9;
    DRV_CONST(DRV_L2EDITTYPE_RWETH2X)       = 0xa;
    DRV_CONST(DRV_L2EDITTYPE_GEMPORT)       = 0xe;
    DRV_CONST(DRV_L2EDITTYPE_LOOPBACK)      = 0xf;
    DRV_CONST(DRV_L3EDITTYPE_NONE)          = 0x0;
    DRV_CONST(DRV_L3EDITTYPE_ADDIP4)        = 0x1;
    DRV_CONST(DRV_L3EDITTYPE_ADDIP44X)      = 0x2;
    DRV_CONST(DRV_L3EDITTYPE_ADDIP6)        = 0x3;
    DRV_CONST(DRV_L3EDITTYPE_MPLS1X)        = 0x4;
    DRV_CONST(DRV_L3EDITTYPE_MPLS2X)        = 0x5;
    DRV_CONST(DRV_L3EDITTYPE_MPLS4X)        = 0x6;
    DRV_CONST(DRV_L3EDITTYPE_ADDRAW)        = 0x7;
    DRV_CONST(DRV_L3EDITTYPE_RWIP41X)       = 0x8;
    DRV_CONST(DRV_L3EDITTYPE_RWIP4)         = 0x9;
    DRV_CONST(DRV_L3EDITTYPE_RWIP6)         = 0xa;
    DRV_CONST(DRV_L3EDITTYPE_RWFLEX)        = 0xb;
    DRV_CONST(DRV_L3EDITTYPE_INSFLEX)       = 0xc;
    DRV_CONST(DRV_L3EDITTYPE_DELMPLS)       = 0xd;
    DRV_CONST(DRV_L3EDITTYPE_DELFLEX)       = 0xe;
    DRV_CONST(DRV_L3EDITTYPE_LOOPBACK)      = 0xf;
    DRV_CONST(DRV_L3EDITTYPE_ADDTRILL)      = 0x10;
    DRV_CONST(DRV_L3EDITTYPE_RWIP68X)       = 0x11;
    DRV_CONST(DRV_L3EDITTYPE_ADDIP68X)      = 0x12;
    DRV_CONST(DRV_L3EDITTYPE_RWIP62X)       = 0x13;
    DRV_CONST(DRV_L3EDITTYPE_INSFLEX8X)     = 0x14;
    DRV_CONST(DRV_L3EDITTYPE_RWFLEX2X)      = 0x15;
    DRV_CONST(DRV_L3EDITTYPE_INSFLEX2X)     = 0x16;
    DRV_CONST(DRV_L3EDITTYPE_DELFLEX2X)     = 0x17;

    DRV_CONST(DRV_METENTRYTYPE_LINKLIST)    = 0;
    DRV_CONST(DRV_METENTRYTYPE_PORTBMP1X)   = 1;
    DRV_CONST(DRV_METENTRYTYPE_PORTBMP2X)   = 2;
    DRV_CONST(DRV_METENTRYTYPE_PORTBMP4X)   = 3;

    DRV_CONST(DRV_METENTRYSLIMTYPE_LINKLIST)          = 0;
    DRV_CONST(DRV_METENTRYSLIMTYPE_LINKLIST_SIMPLE1X) = 1;
    DRV_CONST(DRV_METENTRYSLIMTYPE_LINKLIST_SIMPLE2X) = 2;
    DRV_CONST(DRV_METENTRYSLIMTYPE_TBD3)              = 3;
    DRV_CONST(DRV_METENTRYSLIMTYPE_PORTBMP1X)         = 4;
    DRV_CONST(DRV_METENTRYSLIMTYPE_PORTBMP2X)         = 5;
    DRV_CONST(DRV_METENTRYSLIMTYPE_PORTBMP4X)         = 6;
    DRV_CONST(DRV_METENTRYSLIMTYPE_TBD7)              = 7;

    DRV_CONST(DRV_NALPM_SRAM_TYPE_V4_32)    = 0x1;
    DRV_CONST(DRV_NALPM_SRAM_TYPE_V6_64)    = 0x2;
    DRV_CONST(DRV_NALPM_SRAM_TYPE_V6_128)   = 0x3;

    DRV_CONST(DRV_MAX_LPM_TCAM_NUM)         = 6;
    DRV_CONST(DRV_MAX_NOR_TCAM_NUM)         = 42;
    DRV_CONST(DRV_EPE_DISCARD_TYPE_NUM)     = 62;

    DRV_CONST(DRV_PARSER_L4_TYPE_UDP)       = 3;
    DRV_CONST(DRV_PARSER_L4_TYPE_GRE)       = 2;
    DRV_CONST(DRV_PARSER_L4_TYPE_TCP)       = 1;
    DRV_CONST(DRV_PARSER_L4_USER_TYPE_UDP_VXLAN)    = 8;
    DRV_CONST(DRV_KEY_METADATA_BITS)                        = 15;

    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_INVALIDPDU)            = 0x0;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETCSLPI)              = 0x1;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARCSLPI)            = 0x2;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETCSLF)               = 0x3;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARCSLF)             = 0x4;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETCSRF)               = 0x5;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARCSRF)             = 0x6;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETDEXC)               = 0x7;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARDEXC)             = 0x8;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETDDEG)               = 0x9;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARDDEG)             = 0xa;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_APSTRIGGER)            = 0xb;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SEQCHECKFAIL)          = 0xc;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SAPICHECKFAIL)         = 0xd;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SAPICHECKCLEAR)        = 0xe;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_DAPICHECKFAIL)         = 0xf;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_DAPICHECKCLEAR)        = 0x10;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CSTYPEFAIL)            = 0x11;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CSTYPEFAILCLEAR)       = 0x12;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CRCERROR)              = 0x13;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_APSRX)                 = 0x14;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_OTHERPDU)              = 0x15;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_BASPERIODCHKFAIL)      = 0x16;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_PDUPROCINCPU)          = 0x17;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETRDI)                = 0x18;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARRDI)              = 0x19;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_FIRSTRXBLOCK)          = 0x1a;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETDREIEXC)            = 0x1b;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARDREIEXC)          = 0x1c;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_SETDREIDEG)            = 0x1d;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CLEARDREIDEG)          = 0x1e;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_DLOCRXCLEAR)           = 0x1f;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_BASPERIODCHKCLEAR)     = 0x20;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_BASSEQMISMATCHCLEAR)   = 0x21;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CVSEQMISMATCHCLEAR)    = 0x22;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_CSSEQMISMATCHCLEAR)    = 0x23;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_APSSEQMISMATCHCLEAR)   = 0x24;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE__1DMSEQMISMATCHCLEAR)  = 0x25;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_DMMSEQMISMATCHCLEAR)   = 0x26;
    DRV_CONST(DRV_FLEXEOAMDEFECTTYPE_DMRSEQMISMATCHCLEAR)   = 0x27;

    DRV_CONST(DRV_FLEXEOAMUPDATEDEFECTTYPE_INVALID)      = 0x0;
    DRV_CONST(DRV_FLEXEOAMUPDATEDEFECTTYPE_BASLOC)       = 0x1;
    DRV_CONST(DRV_FLEXEOAMUPDATEDEFECTTYPE_SIGNALFAIL)   = 0x2;
    DRV_CONST(DRV_FLEXEOAMUPDATEDEFECTTYPE_SIGNALOK)     = 0x3;
    DRV_CONST(DRV_FLEXEOAMUPDATEDEFECTTYPE_DLOCRXCLEAR)  = 0x4;

    DRV_CONST(DRV_EGRACL_L3K160_SHAREFIELDS_L4PORT_RNG_BMP) = 3;
    DRV_CONST(DRV_EGRACL_L3K160_SHAREFIELDS_DEFAULT)        = 0;

    DRV_CONST(DRV_DIAG_MAC_HASH_WIDTH)      = 87;
    DRV_CONST(DRV_DIAG_IPV4_HASH_WIDTH)     = 87;
    DRV_CONST(DRV_DIAG_MPLS_HASH_WIDTH)     = 35;
    DRV_CONST(DRV_DIAG_OAM_MEP_WIDTH)       = 180;
    DRV_CONST(DRV_DIAG_APS_WIDTH)           = 160;
    DRV_CONST(DRV_DIAG_FLEX_TCAM_WIDTH)     = 160;
    DRV_CONST(DRV_DIAG_EDIT_WIDTH)          = 100;

    DRV_CONST(DRV_ACCREQ_ADDR_HOST0) = 0x85b55a64; /*FibHashKeyCpuReq + 0x24*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_HOST0) = 29;
    DRV_CONST(DRV_ACCREQ_ADDR_FIB) = 0x48405b30;/*FibHashCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_FIB) = 8;
    DRV_CONST(DRV_ACCREQ_ADDR_USERID) = 0x5ba5d8b0;/*UserIdCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_USERID) = 3;    /* UserIdCpuLookupReq_cpuLookupReqValid_f */
    DRV_CONST(DRV_ACCREQ_ADDR_CIDPAIR) = 0x5b14a8b4;/*CidPairHashCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_CIDPAIRHASH) = 3;
    DRV_CONST(DRV_ACCREQ_ADDR_MPLS) = 0x55010efc; /*MplsCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_MPLS) = 3;
    DRV_CONST(DRV_ACCREQ_ADDR_GEMPORT) = 0x4600b5d8;
    DRV_CONST(DRV_ACCREQ_BITOFFSET_GEMPORT) = 22;
    DRV_CONST(DRV_ACCREQ_ADDR_EGRESSSCL) = 0x5500a2bc; /* EgressSclCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_EGRESSSCL) = 0;  /*EgressSclCpuLookupReq_cpuLookupReqValid_f*/
    DRV_CONST(DRV_ACCREQ_ADDR_OAM) = 0x5ab208cc; /*OamCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_OAM) = 0;
    DRV_CONST(DRV_ACCREQ_ADDR_OAMRMEP) = 0x85c70a54; /*OamRmepCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_OAMRMEP) = 0;
    DRV_CONST(DRV_ACCREQ_ADDR_QUEUEHASH) = 0x80e4e8dc;
    DRV_CONST(DRV_ACCREQ_BITOFFSET_QUEUEHASH) = 16;
    DRV_CONST(DRV_ACCREQ_ADDR_DOT1AE_TX) = 0x852964a0;/*XSecTxCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_ADDR_DOT1AE_RX) = 0x85418020;/*XSecRxCpuLookupReq*/
    DRV_CONST(DRV_ACCREQ_BITOFFSET_DOT1AE) = 1;

    DRV_CONST(DRV_OAM_MEPTYPE_ETH_CCM_MEP)       =0x0;
    DRV_CONST(DRV_OAM_MEPTYPE_PBT_CCM_MEP)       =0x1;
    DRV_CONST(DRV_OAM_MEPTYPE_TRILL_BFD_MEP)     =0x2;
    DRV_CONST(DRV_OAM_MEPTYPE_FFD_MEP)           =0x3;
    DRV_CONST(DRV_OAM_MEPTYPE_CV1_MEP)           =0x4;
    DRV_CONST(DRV_OAM_MEPTYPE_BFD_MEP)           =0x5;
    DRV_CONST(DRV_OAM_MEPTYPE_ACH_Y1731_MEP)     =0x6;
    DRV_CONST(DRV_OAM_MEPTYPE_ACH_BFD_MEP)       =0x7;
    DRV_CONST(DRV_OAM_MEPTYPE_EXT_ETH_CCM_MEP)   =0x8;
    DRV_CONST(DRV_OAM_MEPTYPE_TWAMP_MEP)         =0x9;
    DRV_CONST(DRV_OAM_MEPTYPE_EXT_ACH_Y1731_MEP) =0xa;

    DRV_CONST(DRV_DsDesc_done_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_done_f_START_BIT) = 16;
    DRV_CONST(DRV_DsDesc_done_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_u1_pkt_sop_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_u1_pkt_sop_f_START_BIT) = 0;
    DRV_CONST(DRV_DsDesc_u1_pkt_sop_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_u1_pkt_eop_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_u1_pkt_eop_f_START_BIT) = 1;
    DRV_CONST(DRV_DsDesc_u1_pkt_eop_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_memAddr_f_START_WORD) = 2;
    DRV_CONST(DRV_DsDesc_memAddr_f_START_BIT) = 4;
    DRV_CONST(DRV_DsDesc_memAddr_f_BIT_WIDTH) = 28;
    DRV_CONST(DRV_DsDesc_realSize_f_START_WORD) = 1;
    DRV_CONST(DRV_DsDesc_realSize_f_START_BIT) = 8;
    DRV_CONST(DRV_DsDesc_realSize_f_BIT_WIDTH) = 20;
    DRV_CONST(DRV_DsDesc_dataStruct_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_dataStruct_f_START_BIT) = 8;
    DRV_CONST(DRV_DsDesc_dataStruct_f_BIT_WIDTH) = 6;
    DRV_CONST(DRV_DsDesc_error_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_error_f_START_BIT) = 17;
    DRV_CONST(DRV_DsDesc_error_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_pause_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_pause_f_START_BIT) = 15;
    DRV_CONST(DRV_DsDesc_pause_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_cfgSize_f_START_WORD) = 0;
    DRV_CONST(DRV_DsDesc_cfgSize_f_START_BIT) = 20;
    DRV_CONST(DRV_DsDesc_cfgSize_f_BIT_WIDTH) = 12;
    DRV_CONST(DRV_DsDesc_cfgSize2_f_START_WORD) = 1;
    DRV_CONST(DRV_DsDesc_cfgSize2_f_START_BIT) = 0;
    DRV_CONST(DRV_DsDesc_cfgSize2_f_BIT_WIDTH) = 8;
    DRV_CONST(DRV_DsDesc_valid_f_START_WORD) = 7;
    DRV_CONST(DRV_DsDesc_valid_f_START_BIT) = 31;
    DRV_CONST(DRV_DsDesc_valid_f_BIT_WIDTH) = 1;
    DRV_CONST(DRV_DsDesc_tsAddr_f_START_WORD) = 3;
    DRV_CONST(DRV_DsDesc_tsAddr_f_START_BIT) = 0;
    DRV_CONST(DRV_DsDesc_tsAddr_f_BIT_WIDTH) = 32;

    DRV_CONST(DRV_HOST0_SINGLE_KEY_BYTE) = 16;
    DRV_CONST(DRV_HOST0_DOUBLE_KEY_BYTE) = 32;
    DRV_CONST(DRV_HOST0_QUAD_KEY_BYTE)   = 64;
    DRV_CONST(DRV_DOT1AE_SINGLE_KEY_BYTE)   = 16;
    DRV_CONST(DRV_NAT_TCAM_AGING_BASE) = 16384;

    DRV_CONST(DRV_MIRROR_INGRESS_L2SPAN_DISCARD) = 0x1;
    DRV_CONST(DRV_MIRROR_INGRESS_L3SPAN_DISCARD) = 0x2;
    DRV_CONST(DRV_MIRROR_INGRESS_ACLLOG_PRI_DISCARD) = 0x3FC;
    DRV_CONST(DRV_MIRROR_INGRESS_IPFIX_MIRROR_DISCARD) = 0x800;
    DRV_CONST(DRV_MIRROR_EGRESS_L2SPAN_DISCARD) = 0x1;
    DRV_CONST(DRV_MIRROR_EGRESS_L3SPAN_DISCARD) = 0x2;
    DRV_CONST(DRV_MIRROR_EGRESS_ACLLOG_PRI_DISCARD) = 0x1C;
    DRV_CONST(DRV_MIRROR_EGRESS_IPFIX_MIRROR_DISCARD) = 0x1000;
    DRV_CONST(DRV_PKT_PP_ID_WITH_IPE_INFO) = 2;
    DRV_CONST(DRV_LEARN_CACHE_NUM) = 32;
    return 0;
}

extern int32
drv_at_ftm_api_init(uint8 lchip);
extern int32
drv_at_ser_api_init(uint8 lchip);

/*HssApbCfg CpuMacHssApbCfg*/
uint32 apb_cfg_addr[41] = {
    0x80064210, 0x800a4210, 0x80164210, 0x801a4210, 0x80264210, 0x802a4210, 0x80364210, 0x803a4210, 
    0x80464210, 0x804a4210, 0x80864210, 0x808a4210, 0x80964210, 0x809a4210, 0x80a64210, 0x80aa4210, 
    0x80b64210, 0x80ba4210, 0x80c64210, 0x80ca4210, 0x81464210, 0x814a4210, 0x81364210, 0x813a4210, 
    0x81264210, 0x812a4210, 0x81164210, 0x811a4210, 0x81064210, 0x810a4210, 0x81c64210, 0x81ca4210, 
    0x81b64210, 0x81ba4210, 0x81a64210, 0x81aa4210, 0x81964210, 0x819a4210, 0x81864210, 0x818a4210, 
    0x85d222c8
};

/*HssApbMon CpuMacHssApbMon*/
uint32 apb_mon_addr[41] = {
    0x80064220, 0x800a4220, 0x80164220, 0x801a4220, 0x80264220, 0x802a4220, 0x80364220, 0x803a4220, 
    0x80464220, 0x804a4220, 0x80864220, 0x808a4220, 0x80964220, 0x809a4220, 0x80a64220, 0x80aa4220, 
    0x80b64220, 0x80ba4220, 0x80c64220, 0x80ca4220, 0x81464220, 0x814a4220, 0x81364220, 0x813a4220, 
    0x81264220, 0x812a4220, 0x81164220, 0x811a4220, 0x81064220, 0x810a4220, 0x81c64220, 0x81ca4220, 
    0x81b64220, 0x81ba4220, 0x81a64220, 0x81aa4220, 0x81964220, 0x819a4220, 0x81864220, 0x818a4220, 
    0x85d222c0
};

/**
 @brief access hss control register
grp_id[7:0] hss id, for NW 0~39, for CPUMAC 40, total 41
      [21:8] rsv 0
      [22] core 0 access flag
      [23] core 1 access flag
*/
int32
drv_at_chip_read_hss(uint8 lchip, uint32 grp_id, uint32 addr, void* p_data)
{
    uint8  idx;
    uint64 cfg_addr1;
    uint64 mon_addr0;
    uint64 mon_addr1;
    uint8  hss_id    = (uint8)(grp_id & 0xff);
    uint64 core_bmp  = (((uint64)grp_id) << 16 ) & ((uint64)0xc0<<32);
    uint32 val_cfg   = 0x60000 | (addr & 0x1ffff); /*u16 addr*/
    uint32 timeout   = 0x6400;
    uint32 val_mon;
    idx = hss_id % 41;

    cfg_addr1 = (((uint64)apb_cfg_addr[idx]) | core_bmp) + 4;
    mon_addr0 = (((uint64)apb_mon_addr[idx]) | core_bmp);
    mon_addr1 = mon_addr0 + 4;

    /*HssApbMon.hssAccAck write 0 to clear previous operation*/
    (void)drv_usw_chip_write(lchip, mon_addr0, 0x00000000);

    /*HssApbCfg*/
    if(DRV_E_NONE != drv_usw_chip_write(lchip, cfg_addr1, val_cfg))
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }

    /*HssApbMon*/
    do{
        (void)drv_usw_chip_read(lchip, mon_addr0, &val_mon);
        if(0x00000001 == (val_mon & 0x00000001))
        {
            break;
        }
    }while(--timeout);

    if(0 == timeout)
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }

    if(DRV_E_NONE != drv_usw_chip_read(lchip, mon_addr1, &val_mon))
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }

    *(uint32*)p_data = val_mon;

    return DRV_E_NONE;
}

/**
 @brief access hss control register
grp_id[7:0] hss id, for NW 0~39, for CPUMAC 40, total 41
      [21:8] rsv 0
      [22] core 0 access flag
      [23] core 1 access flag
*/
int32
drv_at_chip_write_hss(uint8 lchip, uint32 grp_id, uint32 addr, void* data)
{
    uint8  idx;
    uint64 cfg_addr0;
    uint64 cfg_addr1;
    uint64 mon_addr0;
    uint8  hss_id    = (uint8)(grp_id & 0xff);
    uint64 core_bmp  = (((uint64)grp_id) << 16 ) & ((uint64)0xc0<<32);
    uint32 val_cfg   = 0x40000 | (addr & 0x1ffff); /*u16 addr*/
    uint32 value     = *(uint32*)data;
    uint32 timeout   = 0x6400;
    uint32 val_mon;

    idx = hss_id % 41;
    
    cfg_addr0 = (((uint64)apb_cfg_addr[idx]) | core_bmp);
    cfg_addr1 = cfg_addr0 + 4;
    mon_addr0 = (((uint64)apb_mon_addr[idx]) | core_bmp);

    /*HssApbMon.hssAccAck write 0 to clear previous operation*/
    (void)drv_usw_chip_write(lchip, mon_addr0, 0x00000000);

    /*HssApbCfg*/
    if(DRV_E_NONE != drv_usw_chip_write(lchip, cfg_addr0, value))
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }
    if(DRV_E_NONE != drv_usw_chip_write(lchip, cfg_addr1, val_cfg))
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }

    /*HssApbMon*/
    do{
        (void)drv_usw_chip_read(lchip, mon_addr0, &val_mon);
        if(0x00000001 == (val_mon & 0x00000001))
        {
            break;
        }
    }while(--timeout);

    if(0 == timeout)
    {
        return DRV_E_ACCESS_HSS12G_FAIL;
    }

    return DRV_E_NONE;
}

drv_io_tcam_db_t drv_at_io_tcam_db[] = {
/*FLOW*/  {0,     0,                              0,                              0, 0, 0},
/*LPM*/   {13,    DRV_LPM_KEY_BYTES_PER_ENTRY,    LpmTcamTcamMem_t,               LpmTcamTcamMem_tcamEntryValid_f, 8, DRV_FTM_LPM_TCAM_KEY0},
/*NAT*/   {13,    DRV_LPM_KEY_BYTES_PER_ENTRY,    LpmTcamTcamMem_t,               LpmTcamTcamMem_tcamEntryValid_f, 8, DRV_FTM_LPM_TCAM_KEY0},
/*ACL0*/  {9,    DRV_BYTES_PER_ENTRY*2,          ProgramIngAclTcamMem_t,            ProgramIngAclTcamMem_valid_f, 16, DRV_FTM_TCAM_KEY4},
/*ACL1*/  {8,    DRV_BYTES_PER_ENTRY*2,          ProgramEgrAclTcamMem_t,         ProgramEgrAclTcamMem_valid_f, 16, DRV_FTM_TCAM_KEY28},
/*SCL0*/  {9,     DRV_BYTES_PER_ENTRY,            UserIdHashTcamMem_t,            UserIdHashTcamMem_tcamEntryValid_f, 8, DRV_FTM_TCAM_KEY0},
/*SCL1*/  {10,    DRV_BYTES_PER_ENTRY*2,          UserIdTcamMem_t,                UserIdTcamMem_tcamEntryValid_f, 16, DRV_FTM_TCAM_KEY2},
/*SCL2*/  {8,     DRV_BYTES_PER_ENTRY,            EgrSclHashTcamMem_t,            EgrSclHashTcamMem_tcamEntryValid_f, 8, DRV_FTM_TCAM_KEY40},
/*CID*/   {0,     8,                              IpeCidTcamMem_t,                IpeCidTcamMem_tcamEntryValid_f, 8, DRV_FTM_CID_TCAM},
/*QUE*/   {0,     0,                              0,                              0, 0, 0},
/*LTID0*/ {0,     20,                             DsLtidSelectTcamMem_t,          DsLtidSelectTcamMem_valid_f, 16, DRV_FTM_SEL_TCAM},
/*VMAC*/  {0,     12,                             IpeHdrAdjRouterMacTcamMem_t,    IpeHdrAdjRouterMacTcamMem_tcamEntryValid_f, 8, DRV_FTM_RMAC_TCAM},
/*UDF*/   {0,     12,                             IpeHdrAdjUdfTcamMem_t,          IpeHdrAdjUdfTcamMem_tcamEntryValid_f, 8, DRV_FTM_UDF_TCAM},
/*LTID1*/ {0,     20,                             DsEgrLtidSelectTcamMem_t,       DsEgrLtidSelectTcamMem_valid_f, 16, DRV_FTM_SEL_TCAM_EGR},
};


/**
 @brief get flow tcam blknum and local index
*/
static  int32
drv_at_tcam_get_blknum_index(uint8 lchip, tbls_id_t tbl_id, uint32 index, uint32 *blknum, uint32 *local_idx)
{
    *local_idx = index;
    *blknum = TCAM_KEY_BLOCK_ID(lchip, tbl_id, 0);

    return DRV_E_NONE;
}

static int32
drv_at_lpm_tcam_get_blknum_index(uint8 lchip, tbls_id_t tbl_id, uint32 index, uint32 *blknum, uint32 *local_idx)
{
    *blknum = index >> 13;
    *local_idx = index - (*blknum << 13);

    return DRV_E_NONE;
}

static drv_mchip_sdb_t drv_sdb_api =
{
    drv_sdb_write
};

int32
drv_tbls_list_init_at(uint8 lchip)
{
    uint8 i = 0;
    uint16 tbl_idx = 0;

    p_drv_master[lchip]->p_tbl_ext_info = (tables_ext_info_t*)mem_malloc(MEM_SYSTEM_MODULE, (MaxTblId_t+1)*sizeof(tables_ext_info_t));
    if(!p_drv_master[lchip]->p_tbl_ext_info)
    {
        return -1;
    }
    sal_memset(p_drv_master[lchip]->p_tbl_ext_info, 0, (MaxTblId_t+1)*sizeof(tables_ext_info_t));

    p_drv_master[lchip]->p_tbl_mapping = (uint16*)mem_malloc(MEM_SYSTEM_MODULE, MaxTblId_t*sizeof(uint16));
    if(!p_drv_master[lchip]->p_tbl_mapping)
    {
        return -1;
    }
    /* The size of p_tbl_info is the number of valid tables plus 1, and the last data is all 0 for invalid table mapping */
    p_drv_master[lchip]->p_tbl_info = drv_at_tbls_list;
    for (tbl_idx = 0; tbl_idx < MaxTblId_t; tbl_idx++)
    {
        p_drv_master[lchip]->p_tbl_mapping[tbl_idx] = (sizeof(drv_at_tbls_list)/sizeof(tables_info_t) -1);
    }
    for (tbl_idx = 0; tbl_idx < (sizeof(drv_at_tbls_list)/sizeof(tables_info_t) -1); tbl_idx++)
    {
        p_drv_master[lchip]->p_tbl_mapping[p_drv_master[lchip]->p_tbl_info[tbl_idx].tbl_id] = tbl_idx;
        if (DRV_FEATURE_MODE_PER_PP == p_drv_master[lchip]->p_tbl_info[tbl_idx].fea_mod)
        {
            p_drv_master[lchip]->p_tbl_info[tbl_idx].fea_mod = DRV_FEATURE_MODE_PER_CORE;
        }
    }
    p_drv_master[lchip]->p_mem_info = drv_at_mem;
    p_drv_master[lchip]->drv_io_tcam_db = drv_at_io_tcam_db;

#ifndef DRV_DS_LITE
    p_drv_master[lchip]->p_tbl_name = drv_at_tbls_name_list;
#endif

    for (i = 0; i < DRV_IO_TCAM_TYPE_NUM; i++)
    {
        p_drv_master[lchip]->drv_io_tcam_db[i].drv_tcam_get_block_info = drv_at_tcam_get_blknum_index;

#if (1 == SDK_WORK_PLATFORM)
        p_drv_master[lchip]->drv_io_tcam_db[i].hw_words = drv_at_io_tcam_db[i].tcam_mem_tbl_id? TABLE_INFO(lchip, drv_at_io_tcam_db[i].tcam_mem_tbl_id).byte/4:0;
#endif
    }
    p_drv_master[lchip]->drv_io_tcam_db[DRV_IO_TCAM_TYPE_LPM].drv_tcam_get_block_info = drv_at_lpm_tcam_get_blknum_index;

    p_drv_master[lchip]->drv_ecc_data.p_intr_tbl = drv_ecc_at_err_intr_tbl;
    p_drv_master[lchip]->drv_ecc_data.p_sbe_cnt  = drv_ecc_at_sbe_cnt;
    p_drv_master[lchip]->drv_ecc_data.p_scan_tcam_tbl = drv_ecc_at_scan_tcam_tbl;

    drv_mem_init_at(lchip);

    p_drv_master[lchip]->p_enum_value = drv_at_enum;
    p_drv_master[lchip]->p_tcam_map = drv_at_tcam_mem_map;


    p_drv_master[lchip]->drv_chip_read_hss = drv_at_chip_read_hss;
    p_drv_master[lchip]->drv_chip_write_hss = drv_at_chip_write_hss;
    p_drv_master[lchip]->mchip_api.p_mchip_sdb = &drv_sdb_api;

    drv_enum_init_at(lchip);

    drv_at_ftm_api_init(lchip);

    drv_at_ser_api_init(lchip);

    TABLE_OP_TYPE(lchip, DsMetEntry1X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetVector1X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetVector2X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetVector4X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetRd1X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetRd2X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetRd4X_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsMetEntryFitExtra_t) = TABLE_OP_TYPE(lchip, DsMet_t);
    TABLE_OP_TYPE(lchip, DsXSecRxL3L4V4HashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecRxL3L4V6HashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecRxL2BasicHashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecRxL2MacsecHashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecRxSpiHashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecTxL3L4V4HashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecTxL3L4V6HashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecTxL2BasicHashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);
    TABLE_OP_TYPE(lchip, DsXSecTxSpiHashKey_t) = TABLE_OP_TYPE(lchip, XSecTxHashKeyTable0_t);

    return 0;
}


int32
drv_tbls_list_deinit_at(uint8 lchip)
{
    if(p_drv_master[lchip]->p_tbl_ext_info)
    {
        mem_free(p_drv_master[lchip]->p_tbl_ext_info);
    }
    if(p_drv_master[lchip]->p_tbl_mapping)
    {
        mem_free(p_drv_master[lchip]->p_tbl_mapping);
    }
    return 0;
}

#undef DRV_DEF_M
#undef DRV_DEF_D
#undef DRV_DEF_DD
#undef DRV_DEF_F
#undef DRV_DEF_FF
#undef DRV_DEF_C
#undef DRV_DEF_E




#endif



